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MCP19116 PDF预览

MCP19116

更新时间: 2024-10-02 01:01:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
246页 3258K
描述
Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller with Improved 8k Word Core

MCP19116 数据手册

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MCP19116/7  
Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller  
with Improved 8k Word Core  
Features  
Microcontroller Features  
• Input Voltage: +4.5V to +42V  
• Precision 8 MHz Internal Oscillator Block:  
- Factory-calibrated to ±1%, typical  
• Interrupt-Capable:  
• Can be configured with multiple topologies includ-  
ing but not limited to:  
- Flyback  
- Ćuk  
- Firmware  
- Interrupt-on-change pins  
- Boost  
• Only 35 Instructions to Learn  
• 8192 Words On-Chip Program Memory  
• High-Endurance Flash:  
- SEPIC (Single-Ended Primary-Inductor  
Converter)  
• Capable of Quasi-Resonant or Fixed-Frequency  
Operation  
- 100,000 write Flash endurance  
- Flash retention: > 40 years  
• Low Quiescent Current: 5 mA Typical  
• Low Sleep Current: 50 µA Typical  
• Low-Side Gate Drivers:  
• Watchdog Timer (WDT) with Independent  
Oscillator for Reliable Operation  
• Programmable Code Protection  
- +5V gate drive with 0.5A sink/source current  
- +10V gate drive with 1A sink/source current  
• Peak Current Mode Control  
• In-Circuit Serial Programming™ (ICSP™) via Two  
Pins  
• Eight I/O Pins and One Input-Only Pin:  
- Two open-drain pins  
• Differential Remote Output Sense  
• Multiple Output Systems:  
• Analog-to-Digital Converter (ADC):  
- 10-bit resolution  
- Master or Slave  
• AEC-Q100 Qualified  
- Five external channels  
• Configurable Parameters:  
• Timer0: 8-bit Timer/Counter with 8-bit Prescaler  
• Enhanced Timer1:  
- VREF, Precision IOUT/VOUT Set Point (DAC)  
- ADC Reference Switch (VDD or AVDD  
)
- 16-bit timer with prescaler  
- Two selectable clock sources  
• Timer2: 8-Bit Timer with Prescaler:  
- 8-bit period register  
- Input Undervoltage Lockout (UVLO)  
- Input Overvoltage Lockout (OVLO)  
- Detection and protection  
I2C Communication:  
- Primary current leading edge blanking (0 ns,  
50 ns, 100 ns and 200 ns)  
- 7-bit address masking  
- Two dedicated address registers  
- Gate drive dead time (16 ns to 256 ns)  
- Fixed switching frequency range:  
31.25 kHz to 2.0 MHz  
Addressable Universal Synchronous Receiver  
Transmitter (AUSART) Modes  
- Slope compensation  
- Asynchronous (Full Duplex)  
- Quasi-Resonant configuration with built-in  
comparator and programmable offset voltage  
adjustment  
- Synchronous - Master (Half Duplex)  
- Synchronous - Slave (Half Duplex)  
- Primary current offset adjustment  
- GPIO pin options  
• Integrated Low-Side Differential Current-Sense  
Amplifier  
• Better than 5% Current Regulation  
• Thermal Shutdown  
2015-2016 Microchip Technology Inc.  
DS20005479B-page 1  

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