Datasheet > MCIMX508CVK8B

MCIMX508CVK8B

更新时间： 2024-01-07 10:24:38

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		外围集成电路
页数	文件大小	规格书
134页	2581K
描述
i.MX50 Applications Processors for Consumer Products

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技术参数
数据手册

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MCIMX508CVK8B 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Transferred	零件包装代码：	BGA
包装说明：	13 X 13 MM, 0.5 MM PITCH, ROHS COMPLIANT, PLASTIC, MABGA-416	针数：	416
Reach Compliance Code：	unknown	ECCN代码：	5A002
HTS代码：	8542.31.00.01	风险等级：	5.72
其他特性：	ALSO OPERATES AT 0.9 V MINIMUM SUPPLY 24 MHZ	JESD-30 代码：	S-PBGA-B416
JESD-609代码：	e1	长度：	13 mm
湿度敏感等级：	3	端子数量：	416
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFBGA
封装等效代码：	BGA416,24X24,20	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	0.95/1.225 V	认证状态：	Not Qualified
座面最大高度：	1.52 mm	子类别：	Graphics Processors
最大压摆率：	185 mA	最大供电电压：	1.275 V
最小供电电压：	1.175 V	标称供电电压：	1.225 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	0.5 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	40
宽度：	13 mm	uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT
Base Number Matches：	1

MCIMX508CVK8B 数据手册

Introduction

– USBOH1 (USB OTG and host controller complex)

– FEC Ethernet controller

•

MAX AHB crossbar (133 MHz)—This connects the various AHB bus sub-segments in the system

and provides decode into the following slaves:

— IP-Bus 1 (66 MHz)—This bus segment contains peripherals accessible by the ARM core and

without DMA capability

— IP-Bus 2 (66 MHz)—This bus segment contains peripherals accessible by the ARM core and

without DMA capability

— APBH DMA bridge (133 MHz)—The APBH DMA bridge is a master to the MAX for its

memory-side DMA operations. The APBH bus is an AMBA APB slave bus providing

peripheral access to many of the high-speed IP blocks on the i.MX50.

•

IP-Bus 3 (66 MHz)—This third peripheral bus segment contains peripherals accessible by the

ARM core and SDMA and as such houses peripherals with DMA capability. The IP-Bus 3 can be

accessed by the ARM CPU through IP-Bus 1 and SPBA.

Quality of service controller (QoSC)—This provides both soft and dynamic arbitration/priority

control. The QoSC works in conjunction with the critical display modules such as the eLCDIF and

EPDC to provide dynamic priority control, based on real-time metrics.

The i.MX50 makes use of dedicated hardware accelerators to achieve state-of-the-art multimedia

performance. The use of hardware accelerators provides both high performance and low power

consumption, while freeing up the CPU core for other tasks.

The i.MX50 incorporates the following hardware accelerators:

•

GPU2Dv1—2D Graphics accelerator, OpenVG 1.1, 200 Mpix/s performance

ePXP—enhanced PiXel Processing Pipeline off loading key pixel processing operations required

to support both LCD and EPD display applications

The i.MX50 includes the following interfaces to external devices:

NOTE

Not all the interfaces are available simultaneously depending on I/O

multiplexer configuration.

•

Displays:

— EPDC (i.MX508 Only)—Supporting direct-driver TFT backplanes beyond 2048 × 1536 at

106 Hz refresh (or 4096 × 4096 at 20 Hz)

— eLCDIF—Supporting beyond SXGA + (1400 × 1050) at 60 Hz resolutions with up to a 32-bit

display interface

— On the i.MX508, both displays can be active simultaneously. If both displays are active, the

eLCDIF only provides a 16-bit interface due to pin muxing.

•

Expansion cards:

— Four SD/MMC card

USB:

— One High Speed (HS) USB 2.0 OTG-capable port with integrated HS USB PHY

i.MX50 Applications Processors for Consumer Products, Rev. 2

Freescale Semiconductor

1 2 3 456 7 8...134

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与MCIMX508CVK8B相关器件

型号	品牌	描述	获取价格	数据表
MCIMX508CVM1B	NXP	i.MX50 Applications Processors for Consumer Products	获取价格
MCIMX508CVM8B	NXP	i.MX50 32-bit MPU, ARM Cortex-A8 core, 800MHz, MAPBGA 400	获取价格
MCIMX508CVM8B	FREESCALE	i.MX50 Applications Processors for Consumer Products	获取价格
MCIMX508CZK8B	FREESCALE	i.MX50 Applications Processors for Consumer Products	获取价格
MCIMX508CZK8B	NXP	i.MX50 Applications Processors for Consumer Products	获取价格
MCIMX511AJM6C	NXP	IC,GRAPHICS PROCESSOR,CMOS,BGA,529PIN,PLASTIC	获取价格

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