Freescale Semiconductor, Inc.
MC56F8346/D
Rev. 8.0, 6/2004
56F8346
Preliminary Technical Data
56F8346 16-bit Hybrid Controller
• Up to 60 MIPS at 60MHz core frequency
• Temperature Sensor
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data
memory
• Two Quadrature Decoders
• Optional On-Chip Regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Chip Select Logic for glueless interface to ROM
and SRAM
• 128KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 8KB of Data RAM
• 8KB of Boot Flash
• Up to 62 GPIO lines
• 144-pin LQFP Package
• Two 6-channel PWM Modules
• Four 4-channel, 12-bit ADCs
OCR_DIS
EMI_MODE
RSTO
V
2
V
VDD
VSS VDDA
VSSA
PP
CAP
EXTBOOT
RESET
5
4
7
5
2
6
JTAG/
EOnCE
Port
PWM Outputs
Current Sense Inputs
or GPIOC
Digital Reg
Analog Reg
PWMA
PWMB
3
3
Low Voltage
Supervisor
16-Bit
56800E Core
Fault Inputs
6
Program Controller
and
Hardware Looping Unit
Address
Generation Unit
Data ALU
Bit
Manipulation
Unit
PWM Outputs
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Current Sense Inputs
or GPIOD
3
4
Fault Inputs
PAB
PDB
CDBR
4
AD0
ADCA
AD1
CDBW
4
5
4
4
R/W Control
Memory
VREF
XDB2
XAB1
XAB2
6
2
8
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
AD0
AD1
Program Memory
64K x 16 Flash
2K x 16 RAM
4K x 16 Boot
Flash
External
Address Bus
Switch
ADCB
A8-15 or GPIOA0-7
GPIOB0 or A16
PAB
PDB
Temp_Sense
System Bus
Control
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
4
7
9
CDBR
CDBW
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
External Data
Bus Switch
Data Memory
4K x 16 Flash
4K x 16 RAM
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or
RD
4
2
Bus Control
GPIOD0-1 or CS2-3
PS (CS0) or GPIOD8
IPBus Bridge (IPBB)
GPIOC
Quad
Peripheral
Device Selects
RW
IPAB
IPWDB
IPRDB
DS (CS1) or GPIOD9
Control
Timer C or Decoding
GPIOE
Peripherals
Quad
Timer D or
GPIOE
2
2
Clock
resets
PLL
FlexCAN
P
System
Integration
Module
O
R
O
SPI0 or
GPIOE
SCI1 or
GPIOD
SCI0 or
GPIOE
COP/
Interrupt
Clock
XTAL
S
Generator
C
Watchdog Controller
EXTAL
4
2
2
CLKMODE
IRQA IRQB
CLKO
56F8346 Block Diagram - 144 LQFP
© Motorola, Inc., 2004. All rights reserved.
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