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MC33742DW PDF预览

MC33742DW

更新时间: 2024-02-05 10:04:17
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 电信集成电路光电二极管
页数 文件大小 规格书
52页 1084K
描述
System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver

MC33742DW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:TransferredReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8JESD-609代码:e3
湿度敏感等级:3峰值回流温度(摄氏度):260
电信集成电路类型:TELECOM CIRCUIT端子面层:Matte Tin (Sn)
处于峰值回流温度下的最长时间:40

MC33742DW 数据手册

 浏览型号MC33742DW的Datasheet PDF文件第1页浏览型号MC33742DW的Datasheet PDF文件第2页浏览型号MC33742DW的Datasheet PDF文件第4页浏览型号MC33742DW的Datasheet PDF文件第5页浏览型号MC33742DW的Datasheet PDF文件第6页浏览型号MC33742DW的Datasheet PDF文件第7页 
Freescale Semiconductor, Inc.  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
WDOG  
CS  
RXD  
TXD  
2
3
V
MOSI  
MISO  
SCLK  
GND  
GND  
GND  
GND  
CANL  
CANH  
L3  
DD  
4
RST  
5
INT  
6
GND  
GND  
GND  
GND  
V2  
7
8
9
10  
11  
12  
13  
14  
V2CTRL  
V
SUP  
HS  
L2  
L0  
L1  
TERMINAL DEFINITIONS  
A functional description of each terminal can be found in the System/Application Information section beginning on page 18.  
Terminal  
Terminal  
Formal Name  
Definition  
Name  
RXD  
TXD  
1
2
3
4
Receive Data  
Transmit Data  
CAN bus receive data output  
CAN bus transmit data input  
5.0 V regulator output terminal.  
V
Voltage Digital Drain  
DD  
RST  
Reset Output  
(Active LOW)  
This is the device reset output whose main function is to reset the MCU. This terminal  
has an internal pull-up current source to VDD  
5
INT  
GND  
Interrupt Output  
(Active LOW)  
This output is asserted LOW when an enabled interrupt condition occurs. The output  
is a push-pull structure.  
6–9  
20–23  
Ground  
Ground of the IC. These terminals are connected to the package lead frame in order to  
provide a thermal path.  
10  
V2  
Voltage Source 2  
Sense input for V2 regulator using external ballast. V2 is also the internal supply for the  
CAN cell.  
11  
12  
V2CTRL  
Voltage Source 2 Control  
Voltage Supply  
Output driver for the external ballast transistor.  
V
Supply input for the complete device.  
SUP  
13  
HS  
High-Side Output  
Level 0–3 Inputs  
Output of internal high-side switch. Current capability is internally limited to 150 mA.  
14–17  
L0–L3  
Input interfaces to external circuitry (switched or ICs). Levels at these terminals can be  
read by SPI and input can be used as programmable wake-up input in Sleep or Stop  
mode.  
18  
19  
24  
25  
26  
27  
CANH  
CANL  
SCLK  
MISO  
MOSI  
CS  
CAN High  
CAN Low  
CAN high output.  
CAN low output.  
Serial Data Clock  
Master In/Slave Out  
Master Out/Slave In  
Clock input for the Serial Peripheral Interface (SPI) of the device.  
SPI data sent to MCU. When CS is HIGH, terminal is high impedance.  
SPI data received by the 33742.  
Chip Select  
Chip select terminal for SPI. When CS is LOW, device is selected.  
(Active LOW)  
28  
WDOG  
Watchdog Output  
(Active LOW)  
Output of watchdog circuitry. Terminal is asserted LOW if software watchdog is not  
correctly triggered.  
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA  
33742  
3
For More Information On This Product,  
Go to: www.freescale.com  

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