MC14067B
Analog Multiplexers /
Demultiplexers
The MC14067 multiplexer/demultiplexer is a digitally controlled
analog switch featuring low ON resistance and very low leakage
current. This device can be used in either digital or analog
applications.
The MC14067 is a 16−channel multiplexer/demultiplexer with an
inhibit and four binary control inputs A, B, C, and D. These control
inputs select 1−of−16 channels by turning ON the appropriate analog
switch (see MC14067 truth table.)
http://onsemi.com
MARKING
DIAGRAMS
PDIP−24
P SUFFIX
CASE 709
MC14067BCP
AWLYYWW
Features
• Low OFF Leakage Current
• Matched Channel Resistance
• Low Quiescent Power Consumption
• Low Crosstalk Between Channels
• Wide Operating Voltage Range: 3 to 18 V
• Low Noise
SOIC−24
DW SUFFIX
CASE 751E
14067B
AWLYYWW
• Pin for Pin Replacement for CD4067B
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V
)
A
= Assembly Location
= Wafer Lot
= Year
SS
WL
YY
WW
Symbol
Parameter
Value
– 0.5 to + 18.0
Unit
V
V
DD
DC Supply Voltage Range
= Work Week
V , V
in out
Input or Output Voltage Range
(DC or Transient)
– 0.5 to V + 0.5
V
DD
I
Input Current (DC or Transient),
per Control Pin
± 10
mA
in
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
I
sw
Switch Through Current
± 25
mA
P
D
Power Dissipation, per Package
(Note 1)
500
mW
T
Ambient Temperature Range
Storage Temperature Range
– 55 to + 125
– 65 to + 150
260
_C
_C
_C
A
T
stg
T
Lead Temperature
(8–Second Soldering)
L
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: − 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
February, 2005 − Rev. 5
MC14067B/D