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MC14015BFR1 PDF预览

MC14015BFR1

更新时间： 2023-01-02 19:13:28
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管
页数 文件大小 规格书
12页 122K
描述
IC,SHIFT REGISTER,CMOS,SOP,16PIN,PLASTIC

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中文翻译

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MC14015BFR1 技术参数

是否Rohs认证： 符合生命周期：Obsolete
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.78计数方向：RIGHT
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
最大频率@ Nom-Sup：1500000 Hz位数：4
功能数量：2端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE电源：5/15 V
认证状态：Not Qualified子类别：Shift Registers
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL

MC14015BFR1 数据手册

 浏览型号MC14015BFR1的Datasheet PDF文件第2页浏览型号MC14015BFR1的Datasheet PDF文件第3页浏览型号MC14015BFR1的Datasheet PDF文件第4页浏览型号MC14015BFR1的Datasheet PDF文件第5页浏览型号MC14015BFR1的Datasheet PDF文件第6页浏览型号MC14015BFR1的Datasheet PDF文件第7页 
MC14015B  
Dual 4-Bit Static  
Shift Register  
The MC14015B dual 4–bit static shift register is constructed with  
MOS P–channel and N–channel enhancement mode devices in a  
single monolithic structure. It consists of two identical, independent  
4–state serial–input/parallel–output registers. Each register has  
independent Clock and Reset inputs with a single serial Data input.  
The register states are type D master–slave flip–flops. Data is shifted  
from one stage to the next during the positive–going clock transition.  
Each register can be cleared when a high level is applied on the Reset  
line. These complementary MOS shift registers find primary use in  
buffer storage and serial–to–parallel conversion where low power  
dissipation and/or noise immunity is desired.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14015BCP  
AWLYYWW  
1
• Diode Protection on All Inputs  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Logic Edge–Clocked Flip–Flop Design —  
16  
1
SOIC–16  
D SUFFIX  
CASE 751B  
14015B  
AWLYWW  
Logic state is retained indefinitely with clock level either high or low;  
information is transferred to the output only on the positive going  
edge of the clock pulse.  
16  
• Capable of Driving Two Low–power TTL Loads or One Low–power  
TSSOP–16  
DT SUFFIX  
CASE 948F  
14  
015B  
ALYW  
Schottky TTL Load Over the Rated Temperature Range.  
1
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
16  
1
Symbol  
Parameter  
Value  
Unit  
V
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14015B  
ALYW  
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
DD  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
500  
mW  
WW, W = Work Week  
per Package (Note 3.)  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
ORDERING INFORMATION  
T
stg  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
T
Lead Temperature  
L
(8–Second Soldering)  
MC14015BCP  
MC14015BD  
2000/Box  
48/Rail  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
MC14015BDR2  
SOIC–16 2500/Tape & Reel  
TSSOP–16 2000/Tape & Reel  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14015BDT  
MC14015BF  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
high–impedance circuit. For proper operation, V and V should be constrained  
in  
out  
MC14015BFEL  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 4  
MC14015B/D  
1234567...12

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