MC13081X

更新时间： 2024-02-07 03:44:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		显示器
页数	文件大小	规格书
20页	223K
描述
Multimode Color Monitor Horizontal, Vertical, and Video Combination Processor

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技术参数
数据手册

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MC13081X 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	SDIP, SDIP56,.6	Reach Compliance Code：	unknown
风险等级：	5.92	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	R-PDIP-T56	JESD-609代码：	e0
端子数量：	56	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SDIP	封装等效代码：	SDIP56,.6
封装形状：	RECTANGULAR	封装形式：	IN-LINE, SHRINK PITCH
电源：	8 V	认证状态：	Not Qualified
子类别：	Other Consumer ICs	表面贴装：	NO
技术：	BIPOLAR	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	1.78 mm	端子位置：	DUAL
Base Number Matches：	1

MC13081X 数据手册

MC13081X

ELECTRICAL CHARACTERISTICS (continued) (T = 25°C, V

= 8.0 Vdc)

Characteristic

VIDEO AMPLIFIERS

Condition

Min

Typ

Max

Unit

Emitter DC Level

39, 34, 31

Vdc

Minimum Brightness

Nominal Brightness

Maximum Brightness

V19 = 0 V

V19 = 2.5 V

V19 = 5.0 V

–

1.25

–

1.0

1.5

2.0

–

1.75

–

Crosstalk, Amplifier to Amplifier

Frequency = 10 MHz

= 0.7 Vpp; V

39, 34, 31

–

Output Rise Time

Output Fall Time

= 3.0 Vpp 39, 34, 31

out

–

5.0

–

PIN FUNCTION DESCRIPTION

Name

Vertical

Oscillator

Capacitor

Equivalent Internal Circuit

Description

This capacitor should be 100 nF film type to give good

temperature stability.

Vertical

Ramp Gen

10.7

2.5 k

1.0 k

5.0 V

Switching

Control

21.3

Vertical Hold

Control

The potentiometer at Pin 2 adjusts the free running

frequency of the oscillator. It should normally be set

for about 55 Hz with no vertical signal input such that

it will lock to 60 Hz.

Vertical

Integrator

Capacitor

The capacitor on this pin integrates the sync pulses

with a long time constant. C3 is typically 0.01 µF.

CIS

1.0 k

Switching

Control

SID

Vertical TTL

Sync

Vertical TTL Sync input. The input threshold voltage

at this pin is 2.0 V.

2.0 V

5.0 V

22 k

To Logic

Sync

Input

10 k

Horizontal TTL

Sync

Composite or Horizontal TTL Sync input. The input

threshold voltage at this pin is 2.0 V.

2.0 V

5.0 V

22 k

To Logic

5.0 V

Sync

Input

10 k

Composite

Video Input

This pin requires a coupling of min 100 nF. The

composite sync input should consist of –V sync

10 k

signal only with amplitude > 500 mVpp.

The source impedance of the sync signal should be

<1.0 kΩ.

1.0 k

To Sync

Separator

Comp

Input

0.1

Sync information at Pin 5 will override this pin, but

signals at Pin 4 will not.

68 k

Minimum pulse width is 2.0 µs.

7, 8

N/C

These two pins are internally connected to each other,

and nothing else.

MOTOROLA ANALOG IC DEVICE DATA

1...3 4 567 8 9...20

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