MC13028A
The phase locked loop (PLL) in the MC13028A is locked to
circuit employs a capacitor to ground at Pin 9 to operate in
conjunction with an internal resistor to create an RC
integration time. The value of the capacitor determines the
amount of time required to produce a stereo indication. This
amount must include the time it takes to check for the
presence of detector falsing due to noise or interference,
station retuning by the customer, and pilot dropout in the
presence of heavy interference. The pilot Q detector utilizes
a filter on its pilot tone PLL error line at Pin 10. This capacitor
to ground (usually 0.47 µF) is present to filter any low
frequency L–R information that may be present on the error
line. If the value of this capacitor is allowed to be too small,
L–R modulation ripple on the error line may get large enough
to cause stereo dropout. If the capacitor value is made too
large, the pilot tone may be prevented from being reacquired
if it is somehow lost due to fluctuating field conditions.
the L–R signal. This insures good stereo distortion
performance at the higher levels of left only or right only
modulations. Under normal operating conditions, the PLL
remains locked because of the current flow capability of the
loop driver circuit. This high gain, high impedance circuit
performs optimally when the current flow is balanced. The
balanced condition is enhanced by the loop driver filter circuit
connected between Pin 14 and ground. The filter circuit
consists of a 47 Ω resistor in series with a 47 µF capacitor. The
47 Ω resistor is to set the Fast Lock rate. It is recommended
that the capacitor be a very low leakage type electrolytic, or a
tantalum composition part because any significant amount of
leakage current flowing through the capacitor will unbalance
the loop driver circuit and result in less than optimum stereo
performance, see Figures 10 and 11.
The pilot tone detector circuit is fed internally from the Q
detector output signal. The circuit input employs a low pass
filter at Pin 11 that is designed to prevent the pilot tone
detector input from being overloaded by higher levels of L–R
modulation. The filter is formed by a 0.22 µF capacitor and
the input impedance of the first amplifier. A pilot I detector
A 1.0 V reference level is created internally from the V
CC
source to the IC. This regulated line is used extensively by
circuits throughout the MC13028A design. An electrolytic
capacitor from Pin 7 to ground is used as a filter for the
reference voltage.
DISCUSSION OF GRAPHS AND FIGURES
If the general recommendations put forth in this application
guide are followed, excellent stereo performance should
result.
The curves in Figures 2 through 7 depict the separation
and the distortion performance in stereo for 30%, 50%, and
65% single channel modulations respectively. The data for
these figures were collected under the conditions of
previous paragraph due to the internal operation of the
clamping circuits. In the field, the transmitters at AM Stereo
radio stations are not usually permitted to modulate single
channel levels past 70%. Therefore these conditions do not
occur very often during normal broadcast material.
The roll–off at both the low and high frequencies of the
30% single channel driven responses is due to the fact that a
post detection bandpass filter of 60 Hz to 10 kHz was used in
the measurement of the data, while a post detection filter of
2.0 Hz to 20 kHz was used for the collection of data in the
50% and 65% modulation examples. The tighter bandwidth
was used while collecting the performance data at 30%
modulation levels in order to assure that the distortion
measurement was indicative of the true distortion products
measured near the noise floor and thus not encumbered by
residual noise and hum levels which would erroneously add
to the magnitude of the harmonic distortion data. Note in
Figure 8 the traces of noise response for the four different
bandwidths of post detection filtering. It can be seen that the
noise floors improve steadily with increasing levels of
incoming 450 kHz as the value of the lower corner frequency
of the filter is increased. Data for the stereo noise floors was
collected with the decoder in the forced stereo mode.
V
= 8.0 V and R = 10 k in both the left and the right
CC
O
channels as applied to the application circuit of Figure 1. A
very precise laboratory generator was used to produce the
AM Stereo test signal of 450 kHz at 70 dBµV fed to Pin 4. An
NRSC post detection filter was not present at the time of
these measurements. The audio separation shows an
average performance at 30% and 50% modulations of
–45 dB in the frequency range of 2.0 kHz to 5.0 kHz. The
corresponding audio distortions under these conditions are
about 0.28% at 30% modulation, and about 0.41% at 50%
modulation.
Figure 6 shows that the typical separation at 65%
modulation in the 2.0 kHz to 5.0 kHz region is about –37 dB,
and the corresponding audio distortion shown in Figure 7 is
about 1.0%. The performance level of these sinusoidal
signals is somewhat less than those discussed in the
9
MOTOROLA ANALOG IC DEVICE DATA
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