Datasheet > MC10EL35_06

MC10EL35_06

更新时间： 2024-01-18 13:19:05

品牌	Logo	应用领域
安森美 - ONSEMI		触发器
页数	文件大小	规格书
8页	145K
描述
5V ECL JK Flip-Flop

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中文翻译

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数据手册

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MC10EL35_06 数据手册

MC10EL35, MC100EL35

5VꢀECL JK Flip-Flop

Description

The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data

enters the master portion of the flip-flop when the clock is LOW and is

transferred to the slave, and thus the outputs, upon a positive transition

of the clock. The reset pin is asynchronous and is activated with a logic

HIGH.

http://onsemi.com

MARKING

The 100 Series contains temperature compensation.

DIAGRAMS*

Features

• 525 ps Propagation Delay

• 2.2G Hz Toggle Frequency

• ESD Protection: > 1 kV Human Body Model,

> 100 V Machine Model

HEL35

KEL35

ALYW

SOIC−8

D SUFFIX

CASE 751

• PECL Mode Operating Range: V = 4.2 V to 5.7 with V = 0 V

• NECL Mode Operating Range: V = 0 V with V = −4.2 V to

−5.7 V

HL35

ALYWG

KL35

ALYWG

• Internal Input Pulldown Resistors on J, K, CLK, and R

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1

TSSOP−8

DT SUFFIX

CASE 948R

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL−94 V−0 @ 0.125 in,

Oxygen Index 28 to 34

• Transistor Count = 81 devices

• Pb−Free Packages are Available

DFN8

MN SUFFIX

CASE 506AA

= MC10

= MC100

= Wafer Lot

= Year

4W = MC10

2L = MC100

W = Work Week

M = Date Code

= Assembly Location G = Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Publication Order Number:

December, 2006 − Rev. 6

MC10EL35/D

12 3 4 5 6 7 8

中文翻译

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