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MB3838APFV

更新时间: 2024-01-25 03:34:01
品牌 Logo 应用领域
富士通 - FUJITSU 信息通信管理光电二极管
页数 文件大小 规格书
34页 338K
描述
Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDSO24, PLASTIC, SSOP-24

MB3838APFV 技术参数

是否Rohs认证: 不符合生命周期:Contact Manufacturer
包装说明:LSSOP, TSSOP24,.3Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDSO-G24
长度:7.75 mm信道数量:1
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-30 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:TSSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:16.8 V认证状态:Not Qualified
座面最大高度:1.45 mm子类别:Power Management Circuits
最大供电电流 (Isup):0.86 mA最大供电电压 (Vsup):25 V
最小供电电压 (Vsup):6.5 V标称供电电压 (Vsup):16.8 V
表面贴装:YES技术:BICMOS
温度等级:OTHER端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.6 mm
Base Number Matches:1

MB3838APFV 数据手册

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MB3838A  
PIN DESCRIPTIONS  
Pin no.  
Symbol  
I/O  
Descriptions  
1
OCV  
I
Discharge/charge state detection terminal  
P-ch MOS FET control terminal for charge control  
(Open collector)  
2
3
COUT  
BAT4  
COVT  
BAT3  
CPDT  
BAT2  
COCT  
BAT1  
DOUT  
O
I
Battery connection terminal  
Condenser connection terminal for setting over-charge detection delay  
time  
4
5
I
I
Battery connection terminal  
Condenser connection terminal for setting over-discharge detection delay  
time  
6
7
Battery connection terminal  
Condenser connection terminal for setting over-current detection delay  
time  
8
9
I
O
I
Battery connection terminal  
P-ch MOS FET control output terminal for discharge control switch  
(CMOS output)  
10  
11  
12  
13  
14  
15  
16  
17  
VIS  
GND  
Current detection terminal  
Ground terminal  
PDWM  
VREF  
VDD  
I
Power down signal input terminal  
Reference voltage output terminal  
VDD regulator output terminal  
Remote-on signal input terminal  
Power supply terminal  
O
O
I
OUTON  
VCC  
Battery voltage monitor and power down advance warning signal output  
terminal  
18  
VS  
O
I
3-cell/4-cell switch terminal  
At “L” level input : 3-cell mode  
At “H” level input : 4-cell mode  
19  
SEL  
20  
21  
22  
23  
24  
AOUT1  
D3  
O
I
Cell voltage monitor output terminal  
Cell voltage and current monitor mode switch signal input terminal  
Cell voltage and current monitor mode switch signal input terminal  
Cell voltage and current monitor mode switch signal input terminal  
Current monitor output terminal  
D2  
I
D1  
I
AOUT2  
O
4

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