Datasheet > MB15E64UVPVB-G-ER2KE1

MB15E64UVPVB-G-ER2KE1

更新时间： 2024-01-30 05:18:59

品牌	Logo	应用领域
富士通 - FUJITSU		/
页数	文件大小	规格书
28页	330K
描述
PLL/Frequency Synthesis Circuit

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技术参数
数据手册

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MB15E64UVPVB-G-ER2KE1 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.72
Base Number Matches：	1

MB15E64UVPVB-G-ER2KE1 数据手册

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Fujitsu semiconductor

Rev2.1

ASSP

Sigma delta Fractional-N PLL Frequency Synthesizer

(3.5GHz single PLL)

MB15E64UV

ꢀDESCRIPTION

The Fujitsu MB15E64UV includes a serial input Sigma delta Fractional Phase Locked Loop (PLL) frequency

synthesizer with fast lock up function. The PLL consists of 3.5GHz sigma delta Fractional-N PLL.

The new package (BCC18) decreases a mount area of MB15E64UV about 50% comparing with the latest package,

BCC20.

MB15E64UV is ideally suitable for digital mobile communications, such as CDMA.

ꢀFEATURE

-Operating frequency

-Fractional-N PLL

: 100MHz – 3500MHz

: modulo 262144(2¹⁸) or 32768(2¹⁵)

Fast lock up and low noise.

:Vcc=2.7V to 3.3V

-Power supply voltage

-Low current consumption : Icc (typ)=4.9mA(Vcc=Vp=3.0V, Ta=25°C)

-Direct power saving function : Power supply current in power saving mode

Typ. 0.1 uA (Vcc=3.0V, Ta=25°C), Max. 10 uA (Vcc=3.0V)

-Integrate the automatic selector circuit for the switching the loop filter (Possible to change the switching time)

-Switching charge pump current by a serial data.

Stable mode: 94uA / Fast lock mode: 4.5mA

-Integrate the open drain switch for the loop filter.

-2-modulus prescaler 16/17

-Serial input programmable reference divider : Binary 6bit R=1 to 63

-Serial input programmable divider consisting of

Binary 4 bit swallow counter : 0 to 15

Binary 8 bit programmable counter : 9 to 255

-Digital lock detector

-On-chip phase control for the phase comparator

-Operating temperature: Ta=-40 to +85 °C

ꢀPACKAGE

18-pad Plastic BCC

LCC-18P-M05

12 3 4 5 6 7...28

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