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MAX9175 PDF预览

MAX9175

更新时间: 2024-10-04 14:58:19
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亚德诺 - ADI /
页数 文件大小 规格书
14页 824K
描述
670MHz、LVDS至LVDS和任意逻辑至LVDS 1:2分配器

MAX9175 数据手册

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19-2827; Rev 1; 4/04  
670MHz LVDS-to-LVDS and Anything-to-LVDS  
1:2 Splitters  
General Description  
Features  
The MAX9174/MAX9175 are 670MHz, low-jitter, low-  
skew 1:2 splitters ideal for protection switching, loop-  
back, and clock and signal distribution. The devices  
1.0ps  
Jitter (max) at 670MHz  
Jitter (max) at 800Mbps Data Rate  
(RMS)  
80ps  
(P-P)  
feature ultra-low 1.0ps  
random jitter (max) that  
(RMS)  
+3.3V Supply  
LVDS Fail-Safe Inputs (MAX9174)  
ensures reliable operation in high-speed links that are  
highly sensitive to timing errors.  
Anything Input (MAX9175) Accepts Differential  
The MAX9174 has a fail-safe LVDS input and LVDS out-  
puts. The MAX9175 has an anything differential input  
(CML/LVDS/LVPECL) and LVDS outputs. The outputs  
can be put into high impedance using the power-down  
inputs. The MAX9174 features a fail-safe circuit that dri-  
ves the outputs high when the input is open, undriven  
and shorted, or undriven and terminated. The MAX9175  
has a bias circuit that forces the outputs high when the  
input is open. The power-down inputs are compatible  
with standard LVTTL/LVCMOS logic. The power-down  
CML/LVDS/LVPECL  
Power-Down Inputs Tolerate -1.0V and V  
+ 1.0V  
CC  
Low-Power CMOS Design  
10-Lead µMAX and Thin QFN Packages  
-40°C to +85°C Operating Temperature Range  
Conform to ANSI TIA/EIA-644 LVDS Standard  
IEC 61000-4-2 Level 4 ESD Rating  
inputs tolerate undershoot of -1V and overshoot of V  
CC  
+ 1V. The MAX9174/MAX9175 are available in 10-pin  
µMAX and 10-lead thin QFN with exposed pad pack-  
ages, and operate from a single +3.3V supply over the  
-40°C to +85°C temperature range.  
Ordering Information  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
10 µMAX  
MAX9174EUB  
MAX9174ETB*  
MAX9175EUB  
MAX9175ETB*  
Applications  
10 Thin QFN-EP**  
10 µMAX  
Protection Switching  
Loopback  
10 Thin QFN-EP**  
Clock Distribution  
*Future product—contact factory for availability.  
**EP = Exposed paddle.  
Functional Diagram and Pin Configurations appear at end  
of data sheet.  
Typical Application Circuit  
CLOCK DISTRIBUTION  
ASIC  
MAX9176  
MAX9174  
CLK IN  
CLK1  
ASIC  
MAX9176  
MAX9174  
CLK IN  
CLK2  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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