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MAX7327AATG+T

更新时间： 2024-02-02 17:21:42
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
21页 1109K
描述
Parallel I/O Port, 16-Bit, 4 I/O, BICMOS, 3.50 X 3.50 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, MO-220, TQFN-24

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MAX7327AATG+T 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFN包装说明：HVQCCN, LCC24,.16SQ,20
针数：24Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.9JESD-30 代码：S-XQCC-N24
JESD-609代码：e0长度：4 mm
位数：16I/O 线路数量：4
端口数量：1端子数量：24
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC24,.16SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE电源：1.8/5 V
认证状态：Not Qualified座面最大高度：0.8 mm
子类别：Parallel IO Port最大供电电压：5.5 V
最小供电电压：1.71 V标称供电电压：3.3 V
表面贴装：YES技术：BICMOS
温度等级：AUTOMOTIVE端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSE

MAX7327AATG+T 数据手册

 浏览型号MAX7327AATG+T的Datasheet PDF文件第5页浏览型号MAX7327AATG+T的Datasheet PDF文件第6页浏览型号MAX7327AATG+T的Datasheet PDF文件第7页浏览型号MAX7327AATG+T的Datasheet PDF文件第9页浏览型号MAX7327AATG+T的Datasheet PDF文件第10页浏览型号MAX7327AATG+T的Datasheet PDF文件第11页 
2
I C Port Expander with 12 Push-Pull Outputs  
and 4 Open-Drain I/Os  
address can be configured dynamically in the applica-  
tion without cycling the device supply.  
pullups and sets the default logic state to low. The  
pullup configuration is correct on power-up for a stan-  
2
dard I C configuration, where SDA or SCL are pulled  
On initial power-up, the MAX7327 cannot decode the  
up to V+ by the external I2C pullup resistors.  
2
address inputs AD0 and AD2 fully until the first I C  
transmission. AD0 and AD2 initially appear to be con-  
nected to V+ or GND. This is important because the  
address selection is used to determine the power-up  
default states of the output ports, I/O port initial logic  
state, and whether pullups are enabled. At power-up,  
There are circumstances where the assumption that  
SDA = SCL = V+ on power-up is not true; for example,  
in applications in which there is legitimate bus activity  
during power-up. If SDA and SCL are terminated with  
pullup resistors to a different supply voltage to the  
MAX7327’s supply voltage, and if that pullup supply  
rises later than the MAX7327’s supply, then SDA or  
SCL may appear at power-up to be connected to GND.  
In such applications, use the four address combina-  
tions that are selected by connecting address inputs  
AD0 and AD2 to V+ or GND (shown in bold in Tables 2  
and 3). These selections are guaranteed to be correct  
at power-up, independent of SDA and SCL behavior. If  
one of the other 12 address combinations is used, an  
unexpected combination of pullups might be asserted  
2
the I C SDA and SCL bus interface lines are high  
impedance at the I/O pins of every device (master or  
slave) connected to the bus, including the MAX7327.  
2
This is guaranteed as part of the I C specification.  
Therefore, when address inputs AD0 and AD2 are con-  
nected to SDA or SCL during power-up, they appear to  
be connected to V+. The pullup selection logic uses  
AD0 to select whether pullups are enabled for ports P2  
and P3, and uses AD2 to select whether pullups are  
enabled for ports P4 and P5. The rule is that a logic-  
high, SDA, or SCL connection selects the pullups and  
sets the logic state to high. A logic-low deselects the  
2
until the first I C transmission (to any device, not neces-  
sarily the MAX7327) is put on the bus.  
Table 2. MAX7327 Address Map for Outputs O0, O1, O6, O7, and Ports P2–P5  
PIN  
DEVICE ADDRESS  
PORTS POWER-UP DEFAULT  
40kΩ INPUT PULLUPS ENABLED  
CONNECTION  
AD2  
AD0  
A6 A5 A4 A3 A2 A1 A0 O7 O6 P5 P4 P3 P2 O1 O0 O7 O6 P5 P4 P3 P2 O1 O0  
SCL  
SCL  
SCL  
SCL  
SDA  
SDA  
SDA  
SDA  
GND  
GND  
GND  
GND  
V+  
GND  
V+  
SCL  
SDA  
GND  
V+  
SCL  
SDA  
GND  
V+  
SCL  
SDA  
GND  
V+  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
Y
Y
Y
—
Y
Y
Y
—
Y
Y
Y
—
Y
Y
—
Y
Y
Y
—
Y
Y
Y
—
Y
Y
Y
Y
—
Y
Y
—
Y
Y
V+  
V+  
V+  
SCL  
SDA  
Y
Y
Y
Y
8
_______________________________________________________________________________________  
1...567891011...21

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