Datasheet > MAX7317AEE+

MAX7317AEE+

更新时间： 2024-02-02 13:38:28

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管外围集成电路
页数	文件大小	规格书
11页	672K
描述
Parallel I/O Port, 1-Bit, 10 I/O, BICMOS, PDSO16, 0.150 INCH, 0.025 INCH PITCH, ROHS COMPLIANT, MO-137, QSOP-16

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MAX7317AEE+ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SSOP
包装说明：	SSOP, SSOP16,.25	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	6 weeks
风险等级：	1.11	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	4.9 mm
湿度敏感等级：	1	位数：	1
I/O 线路数量：	10	端口数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装等效代码：	SSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	电源：	2.5/3.3 V
认证状态：	Not Qualified	座面最大高度：	1.75 mm
子类别：	Parallel IO Port	最大供电电压：	3.6 V
最小供电电压：	2.25 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	BICMOS
温度等级：	AUTOMOTIVE	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：	1

MAX7317AEE+ 数据手册

MAX7317

10-Port SPI-Interfaced I/O Expander with

Overvoltage and Hot-Insertion Protection

The 10 registers, 0x00 through 0x09, control an I/O port

each (Table 4). Four pseudo-register addresses, 0x0A

through 0x0D, allow groups of outputs to be set to the

same value with a single command by writing the same

data to multiple output registers.

Detailed Description

The MAX7317 is a general-purpose input/output (GPIO)

peripheral that provides 10 I/O ports, P0 to P9, con-

trolled through a high-speed SPI-compatible serial

interface. The 10 I/O ports can be used as inputs or

open-drain outputs in any combination. Ports withstand

7V independent of the MAX7317’s supply voltage whether

used as inputs or outputs.

Serial Interface

The MAX7317 communicates through an SPI-

compatible 4-wire serial interface. The interface has

three inputs: clock (SCLK), chip select (CS), and data in

(DIN), and one output, data out (DOUT). CS must be

low to clock data into or out of the device, and DIN

must be stable when sampled on the rising edge of

SCLK. DOUT is stable on the rising edge of SCLK.

Figure 1 shows the I/O port structure of the MAX7317.

The MAX7317 contains 10 internal registers, addressed

as 0x00–0x09, which control the peripheral (Table 2).

Two further addresses, 0x0E and 0x0F, do not store

data but return the port input status when read. Four

virtual addresses, 0x0A–0x0D, allow more than one

software. The RAM register provides 1 byte of memory

that can be used for any purpose. The no-op address,

0x20, causes no action when written or read, and is

used as a dummy register when accessing one

MAX7317 out of multiple cascaded devices.

SCLK and DIN can be used to transmit data to other

peripherals. The MAX7317 ignores all activity on SCLK

and DIN except when CS is low.

Note that the SPI protocol expects DOUT to be high

impedance when the MAX7317 is not being accessed;

DOUT on the MAX7317 is never high impedance. Go to

www.maximintegrated.com/an1879 for ways to convert

the MAX7317 to tri-state, if required.

Initial Power-Up

Control and Operation Using

the 4-Wire Interface

Controlling the MAX7317 requires sending a 16-bit

word. The first byte, D15 through D8, is the command,

and the second byte, D7 through D0, is the data byte

(Table 5).

On power-up, all control registers are reset (Table

2). Power-up status sets I/O ports P0 to P9 high

impedance, and puts the device into shutdown mode.

RAM Register

The RAM register provides a byte of memory that can

be used for any purpose.

GPIO Port Direction Conﬁguration

The 10 I/O ports P0 through P9 can be configured to

any combination of inputs and outputs. Ports with-

stand 7V independent of the MAX7317’s supply voltage,

whether used as inputs or outputs. Configure a port as

an input by setting its output register to 0x01, which

sets the port output high impedance (Table 4).

OUTPUT

PORT REGISTER

DATA FROM

SHIFT REGISTER

OUTPUT PORT

I/O PIN

WRITE PULSE

Input Port Registers

Reading an input port register returns the logic levels at

the I/O port pins. The input port registers are read only.

A write to an input port register is ignored.

GND

INPUT

PORT REGISTER

INPUT PORT

Output Registers

The MAX7317 uses one 8-bit register to control each

output port (Table 4). Each port can be configured as

an input or open-drain output. Write 0x00 to the output

set the port as a logic-high output or logic input.

READ PULSE

Figure 1. Simplified Schematic of I/O Ports

Maxim Integrated

│ 5

www.maximintegrated.com

1 2 3 456 7 8...11

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与MAX7317AEE+相关器件

型号	品牌	描述	获取价格	数据表
MAX7317AEE+T	MAXIM	Parallel I/O Port, 1-Bit, 10 I/O, BICMOS, PDSO16, 0.150 INCH, 0.025 INCH PITCH, ROHS COMPL	获取价格
MAX7317AEE-T	MAXIM	暂无描述	获取价格
MAX7317ATE	MAXIM	10-Port SPI-Interfaced I/O Expander with Overvoltage and Hot-Insertion Protection	获取价格
MAX7317ATE+	MAXIM	Parallel I/O Port, 1-Bit, 10 I/O, BICMOS, 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, MO-220	获取价格
MAX7317ATE+T	MAXIM	Parallel I/O Port, 1-Bit, 10 I/O, BICMOS, 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, MO-220	获取价格
MAX7318	MAXIM	2-Wire-Interfaced, 16-Bit, I/O Port Expander with Interrupt and Hot-Insertion Protection	获取价格

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