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MAX3992

更新时间: 2024-01-05 10:32:35
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美信 - MAXIM /
页数 文件大小 规格书
12页 271K
描述
10Gbps Clock and Data Recovery with Equalizer

MAX3992 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFN包装说明:4 X 4 MM, 0.80 MM HEIGHT, QFN-24
针数:24Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.86
应用程序:SONET;SDHJESD-30 代码:S-XQCC-N24
JESD-609代码:e0长度:4 mm
湿度敏感等级:1功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC24,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:ATM/SONET/SDH ICs最大压摆率:0.145 mA
标称供电电压:3.3 V表面贴装:YES
技术:BIPOLAR电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

MAX3992 数据手册

 浏览型号MAX3992的Datasheet PDF文件第2页浏览型号MAX3992的Datasheet PDF文件第3页浏览型号MAX3992的Datasheet PDF文件第4页浏览型号MAX3992的Datasheet PDF文件第5页浏览型号MAX3992的Datasheet PDF文件第6页浏览型号MAX3992的Datasheet PDF文件第7页 
19-3496; Rev 2; 11/06  
10Gbps Clock and Data Recovery  
with Equalizer  
General Description  
Features  
Multirate Operation from 9.95Gbps to 11.1Gbps  
Span Up to 300mm (12in) FR4 with One Connector  
Low-Output Jitter Generation: 4mUIRMS  
Low-Output Deterministic Jitter: 4.6psP-P  
XFI-Compliant Input Interface  
The MAX3992 is a 10Gbps clock and data recovery  
(CDR) with equalizer IC for XFP optical transmitters. The  
MAX3992 and the MAX3991 (CDR with limiting amplifier)  
form a signal conditioner chipset for use in XFP trans-  
ceiver modules. The chipset is XFI compliant and offers  
multirate operation for data rates from 9.95Gbps to  
11.1Gbps.  
The MAX3992 recovers the data for up to 12 inches of  
FR-4 and one connector without the need for a stand-  
alone equalizer. The phase-locked loop is optimized for  
jitter tolerance in SONET, Ethernet, and Fibre-Channel  
LOS Indicator  
LOL Indicator  
Power Dissipation: 356mW  
applications. Low jitter generation of 4mUI  
leaves  
RMS  
adequate margin for meeting SONET jitter requirements  
at the optical output.  
An AC-based power detector asserts the loss-of-signal  
(LOS) output when the input signal is removed. An exter-  
nal reference clock, with frequency equal to 1/64 or 1/16  
of the serial data rate, is used to aid in frequency acqui-  
sition. A loss-of-lock (LOL) indicator is provided to indi-  
cate the lock status of the receiver PLL.  
Ordering Information  
PIN-  
PACKAGE  
PKG  
CODE  
PART  
TEMP RANGE  
MAX3992UTG  
0°C to +85°C  
0°C to +85°C  
24 QFN  
24 QFN  
T2444-4  
T2444-4  
MAX3992UTG+*  
The MAX3992 is available in a 4mm x 4mm, 24-pin QFN  
package. It consumes 356mW from a single +3.3V sup-  
ply and operates over a 0°C to +85°C temperature range.  
*Future product—contact factory for availability.  
+Denotes lead-free package.  
Pin Configuration  
Applications  
9.95Gbps to 11.1Gbps Optical XFP Modules  
SONET OC-192/SDH STM-64 XFP Transceivers  
10.3Gbps/11.1Gbps Ethernet XFP Transceivers  
10.5Gbps Fibre-Channel XFP Transceivers  
10Gbps DWDM Transceivers  
TOP VIEW  
24  
23  
22  
21  
20  
19  
V
CC  
V
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
CC  
10Gbps XFP Copper Modules  
GND  
SDI-  
SDI+  
GND  
GND  
SDO-  
SDO+  
GND  
High-Speed Backplane Interconnects  
MAX3992  
V
CC  
V
CC  
Typical Application Circuit appears at end of data sheet.  
7
8
9
10  
11  
12  
4mm x 4mm QFN*  
*THE EXPOSED PAD MUST BE CONNECTED TO CIRCUIT-BOARD GROUND FOR  
PROPER THERMAL AND ELECTRICAL PERFORMANCE.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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