MAX38888
2.5V to 5.0V, 0.5A/2.5A Reversible Buck/Boost
Regulator for Backup Power Applications
Electrical Characteristics (continued)
(V
= 3.7V, V
= 2.7V, T = -40°C to +125°C (typical values at T = +25°C), circuit of Figure 1, unless otherwise specified.)
SYS
CAP
J
J
PARAMETER
SYMBOL
CONDITIONS
MIN
1.7
TYP
1.8
MAX
1.9
UNITS
UVLO Threshold
V
V
VSYS
falling, 100mV typical hysteresis
V
V
UVLOF
FBS Backup Voltage
V
FBS
FBS rising, when discharging stops
-2%
0.5
+2%
FBS Charging
Threshold
Above FBS backup voltage, when
charging begins, 30mV typical hysteresis
V
25
60
0.5
95
mV
V
TH_FBS_CHG
FBCH rising, when charging stops, 25mV
typical hysteresis
FBCH Threshold
FBCL Threshold
V
-2%
+2%
TH_FBCH
FBCL falling, when preserve mode starts,
25mV typical hysteresis
V
-3.5%
225
0.475
+3.5%
V
TH_FBCL
V
IL
When LX stops switching, EN falling
EN rising
600
660
EN Threshold
mV
kΩ
V
IH
925
100
ISET Resistor Range
R
ISET
Guaranteed by LX peak current limits
20
Circuit of Figure 1, V
= 2V, V
=
=
CAP
CAP
SYS
SYS
SYS
2.0
2.5
0.50
500
100
3.0
2.9V, R
= 20kΩ
ISET
LX Peak Backup
Current Limit (Note 1)
I
A
DCHG
Circuit of Figure 1, V
2.9V, R = 100kΩ
= 2V, V
SYS
ISET
Circuit of Figure 1, V
2V, R = 20kΩ
= 3.7V, V
= 3.7V, V
=
=
CAP
CAP
400
600
LX Peak Charge Current
Limit (Note 1)
ISET
I
mA
CHG
Circuit of Figure 1, V
2V, R
= 100kΩ
ISET
V
V
= 0.5V, T = +25°C
A
-0.1
-0.1
0.001
0.01
0.001
0.01
2
0.1
0.1
FBS/FBCH/FBCL Input
Bias Current
I
FBS/FBCH/FBCL
FBS/FBCH/
FBCL
μA
μA
= 0.5V
FBS/FBCH/FBCL
0V < V < 5.5V, T = +25°C
EN Input Leakage
Current
EN
A
I
EN
0V < V
< 5.5V
EN
LX Switching Frequency
f
Delivering maximum current from CAP
MHz
mΩ
SW
LX Low-Side FET
Resistance
R
LOW
V
SYS
= 3V, LX switched to GND
= 3V, LX switched to SYS
50
80
100
160
1
LX High-Side FET
Resistance
R
HIGH
V
V
mΩ
μA
SYS
= 0V, V
= 5V, V = 0V/5V, T =
LX A
EN
SYS
-1
+25°C
LX Leakage Current
I
LX_LKG
V
= 0V, V
= 5V, V = 0V/5V
0.1
400
100
EN
SYS
LX
Maximum On-Time
Minimum Off-Time
t
Backup mode, V
Backup mode, V
= 0.485V
= 0.485V
320
80
480
120
ns
ns
ON
FBS
FBS
t
OFF
Overtemperature
Lockout Threshold
T
T rising, 15°C typical hysteresis
165
50
°C
mA
mA
OTLO
J
High-Side FET Zero-
Crossing (Note 1)
Circuit of Figure 1, V
2.9V
= 2V, V
=
CAP
SYS
SYS
I
25
75
ZXP
Low-Side FET Zero-
Crossing (Note 1)
Circuit of Figure 1, V
2V
= 3.7V, V
=
CAP
I
25
-1
50
75
1
ZXN
V
V
= 0V, V
= 0V, V
= 5V, T = +25°C
A
BKUPB Leakage
Current
EN
BKUPB
BKUPB
I
μA
BKUPB
= 5V
0.1
EN
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