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MAX24288ETK2T PDF预览

MAX24288ETK2T

更新时间： 2024-09-28 19:55:11
品牌 Logo 应用领域
美高森美 - MICROSEMI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
122页 1865K
描述
ATM/SONET/SDH IC,

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中文翻译

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MAX24288ETK2T 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：HVQCCN, LCC68,.32SQ,16Reach Compliance Code：compliant
风险等级：5.63数据速率：1000000 Mbps
JESD-30 代码：S-XQCC-N68JESD-609代码：e3
长度：8 mm功能数量：1
端子数量：68最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC68,.32SQ,16
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度：0.8 mm标称供电电压：1.2 V
表面贴装：YES电信集成电路类型：ATM/SONET/SDH SERIAL TO PARALLEL/PARALLEL TO SERIAL CONVERTER
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：NO LEAD端子节距：0.4 mm
端子位置：QUAD宽度：8 mm
Base Number Matches：1

MAX24288ETK2T 数据手册

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Data Sheet  
April 2018  
MAX24288  
IEEE 1588 Packet Timestamper and Clock  
and 1Gbps Parallel-to-Serial MII Converter  
General Description  
Highlighted Features  
Complete Hardware Support for IEEE 1588  
Ordinary, Boundary, and Transparent Clocks  
Flexible Block for Any 1588 Architecture  
1588 Clock Hardware  
The MAX24288 is a flexible, low-cost IEEE 1588  
clock and timestamper with an SGMII or 1000BASE-X  
serial interface and a parallel MII interface that can  
be configured for GMII, RGMII, or 10/100 MII. The  
device provides all required hardware support for  
high-accuracy time and frequency synchronization  
using the IEEE 1588 Precision Time Protocol. In both  
the transmit and receive directions 1588 packets are  
identified and timestamped with high precision.  
System software makes use of these timestamps to  
determine the time offset between the system and its  
timing master. Software can then correct any time  
error by steering the device’s 1588 clock subsystem  
appropriately. The device provides the necessary I/O  
to time-synchronize with a 1588 master elsewhere in  
the same system or to be the master to which slave  
components can synchronize.  
Steerable by Software with 2-8ns Time  
Resolution and 2-32ns Period Resolution  
1ns Input Timestamp Accuracy and Output  
Edge Placement Accuracy  
Three Time/Frequency Controls: Direct Time  
Write, Time Adjustment, and High-Resolution  
Frequency Adjustment  
Programmable Clock and Time-Alignment I/O  
Input Event Timestamper Detects Incoming  
Time Alignment (e.g., 1 PPS) or Clock Edges  
Output Event Generator Provides Output Clock  
Signal or Time Alignment Signal  
Built-In Support for Telecom Equipment Timing  
Architecture with Dual Redundant Timing Cards  
In addition, the MAX24288 is a full-featured, gigabit  
parallel-to-serial MII converter. It provides full SGMII  
revision 1.8 compliance and also interfaces directly to  
1Gbps 1000BASE-X SFP optical modules.  
1588 Timestamping Hardware  
1588 v1 and v2 Packets, Transmit and Receive  
Packet Classifier Supports 1588 Over Ethernet,  
IPv4/UDP, IPv6/UDP ,or MPLS, and Is  
Programmable for More Complex Stacks  
Applications  
1588-Enabled Equipment with 1G Ethernet Ports  
Wireless Base Stations and Controllers  
Switches, Routers, DSLAMs, PON Equipment  
Pseudowire Circuit Emulation Equipment  
Test and Measurement Systems  
Supports 802.1Q VLAN Tags and MAC-in-MAC  
One-Step Operation: On-the-Fly Timestamp  
Insertion or Transparent Clock Corrections; No  
Need for Follow-Up Packets  
Industrial and Factory Automation Equipment  
Medical Equipment  
Can Insert All Timestamps, Receive and  
Transmit, Into Packets for Easy Software Access  
Optional Two-Step Operation  
Ordering Information  
Parallel-to-Serial MII Conversion  
PART  
TEMP RANGE  
PIN-PACKAGE  
Bidirectional Wire-Speed Interface Conversion  
Serial: 1000BASE-X or SGMII v1.8 (4, 6, or 8 Pin)  
Parallel: GMII, RGMII, or 10/100 MII  
Translates Link Speed and Duplex Mode  
Negotiation Between MDIO and SGMII PCS  
68 TQFN-EP*  
trays  
MAX24288ETK2  
-40C to +85C  
68 TQFN-EP*  
tape & reel  
MAX24288ETK2T  
-40C to +85C  
Suffix 2 denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
Full Support for 1588 + Synchronous Ethernet  
MDIO and SPI™ Interfaces  
Block Diagram appears on page 8.  
Register Map appears on page 64.  
1.2V Operation with 3.3V I/O  
1
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