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MAX19516 PDF预览

MAX19516

更新时间: 2024-10-03 11:18:11
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美信 - MAXIM /
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35页 425K
描述
Dual-Channel, 10-Bit, 100Msps ADC

MAX19516 数据手册

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19-4226; Rev 1; 10/08  
Dual-Channel, 10-Bit, 100Msps ADC  
MAX9516  
General Description  
Features  
The MAX19516 dual-channel, analog-to-digital convert-  
er (ADC) provides 10-bit resolution and a maximum  
sample rate of 100Msps.  
o Very-Low-Power Operation (57mW/Channel at  
100Msps)  
o 1.8V or 2.5V to 3.3V Analog Supply  
The MAX19516 analog input accepts a wide 0.4V to  
1.4V input common-mode voltage range, allowing DC-  
coupled inputs for a wide range of RF, IF, and base-  
band front-end components. The MAX19516 provides  
excellent dynamic performance from baseband to high  
input frequencies beyond 400MHz, making the device  
ideal for zero-intermediate frequency (ZIF) and high-  
intermediate frequency (IF) sampling applications. The  
typical signal-to-noise ratio (SNR) performance is  
60dBFS and typical spurious-free dynamic range  
o Excellent Dynamic Performance  
60dBFS SNR at 70MHz  
82dBc SFDR at 70MHz  
o User-Programmable Adjustments and Feature  
Selection through an SPI™ Interface  
o Selectable Data Bus (Dual CMOS or Single  
Multiplexed CMOS)  
o DCLK Output and Programmable Data Output  
(SFDR) is 82dBc at f = 70MHz and f  
= 100MHz.  
IN  
CLK  
Timing Simplifies High-Speed Digital Interface  
The MAX19516 operates from a 1.8V supply.  
Additionally, an integrated, self-sensing voltage regula-  
tor allows operation from a 2.5V to 3.3V supply (AVDD).  
The digital output drivers operate on an independent  
supply voltage (OVDD) over the 1.8V to 3.5V range.  
The analog power consumption is only 57mW per chan-  
o Very Wide Input Common-Mode Voltage Range  
(0.4V to 1.4V)  
o Very High Analog Input Bandwidth (> 850MHz)  
o Single-Ended or Differential Analog Inputs  
o Single-Ended or Differential Clock Input  
nel at V  
= 1.8V. In addition to low operating  
AVDD  
power, the MAX19516 consumes only 1mW in power-  
down mode and 17mW in standby mode.  
o Divide-by-One (DIV1), Divide-by-Two (DIV2), and  
Divide-by-Four (DIV4) Clock Modes  
Various adjustments and feature selections are avail-  
able through programmable registers that are  
accessed through the 3-wire serial-port interface.  
Alternatively, the serial-port interface can be disabled,  
with the three pins available to select output mode,  
data format, and clock-divider mode. Data outputs are  
available through a dual parallel CMOS-compatible out-  
put data bus that can also be configured as a single  
multiplexed parallel CMOS bus.  
o Two’s Complement, Gray Code, and Offset Binary  
Output Data Format  
o Out-of-Range Indicator (DOR)  
o CMOS Output Internal Termination Options  
(Programmable)  
o Reversible Bit Order (Programmable)  
o Data Output Test Patterns  
The MAX19516 is available in a small 7mm x 7mm 48-  
pin thin QFN package and is specified over the -40°C  
to +85°C extended temperature range.  
o Small 7mm x 7mm 48-Pin Thin QFN Package with  
Exposed Pad  
Refer to the MAX19505, MAX19506, and MAX19507  
data sheets for pin- and feature-compatible 8-bit,  
65Msps, 100Msps, and 130Msps versions, respectively.  
Refer to the MAX19515 and MAX19517 data sheets for  
pin- and feature-compatible 10-bit, 65Msps and  
130Msps versions, respectively.  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX19516ETM+  
-40°C to +85°C  
48 TQFN-EP*  
+Denotes a lead-free/RoHS-compliant package.  
*EP = Exposed pad.  
Applications  
IF and Baseband Communications, Including  
Cellular Base Stations and Point-to-Point  
Microwave Receivers  
Ultrasound and Medical Imaging  
Portable Instrumentation and Low-Power Data  
Acquisition  
Pin Configuration appears at end of data sheet.  
Digital Set-Top Boxes  
SPI is a trademark of Motorola, Inc.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  

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