Datasheet > MAF00009AEM

MAF00009AEM

更新时间： 2024-09-26 22:25:39

品牌	Logo	应用领域
松下 - PANASONIC		/
页数	文件大小	规格书
3页	437K
描述
Cascade connection possible (usable as a 16-bit to 32-bit timer)

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中文翻译

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数据手册

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MAF00009AEM 数据手册

MN103S57G

MN103S57G (under development)

128 K-byte

Type

Command ROM (×64-bit)

Data RAM (×32-bit)

Package

16 K-byte

*Pb-free

LQFP100-P-1414

Minimum Instruction

Execution Time

25.0 ns (at 3.0 V to 3.6 V, 40 MHz)

• RESET • IRQ × 8 • NMI • Timer × 28 • SIF × 10 • I²C × 2

Interrupts

• DMA × 12 • WDT • A/D • System error

8-bit timer × 10

Timer Counter

Reload-down count

Cascade connection possible (usable as a 16-bit to 32-bit timer)

16-bit timer × 6

Up-down count

Input capture function

PWM generating function

Compare/capture register 2-ch.

Watchdog timer × 1

Number of channels: 4

DMA Controller

Unit of transfer: 8/16/32 bits

Max. Transfer cycles: 65535

Staring factor: external interrupt, timer factor, serial transmission/reception factor, I²C transmission/reception

factor, external transmission request factor, A/D conversion finish, software factor

Transfer method: 2-bus cycle transfer

Adressing modes: fixed, increment, decrement

Transfer modes: word transfer, burst transfer, intermittent transfer

UART/synchronous/multi-master I²C interface selective: 2

UART/synchronous interface selective: 3

Serial Interface

• Common use

I/O Pins

I/O

10-bit × 12-ch.

A/D Inputs

T.B.D.

Electrical Characteristics

MAF00009AEM

12 3

中文翻译

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