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M65617 PDF预览

M65617

更新时间: 2024-01-23 18:39:35
品牌 Logo 应用领域
三菱 - MITSUBISHI /
页数 文件大小 规格书
15页 77K
描述
PICTURE-IN-PICTURE SIGNAL PROCESSING

M65617 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:SDIP, SDIP52,.6
针数:52Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
Is Samacsys:N商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PDIP-T52JESD-609代码:e0
长度:45.85 mm功能数量:1
端子数量:52最高工作温度:75 °C
最低工作温度:-10 °C封装主体材料:PLASTIC/EPOXY
封装代码:SDIP封装等效代码:SDIP52,.6
封装形状:RECTANGULAR封装形式:IN-LINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:5.5 mm
子类别:Superimposer ICs最大压摆率:140 mA
最大供电电压 (Vsup):3.5 V最小供电电压 (Vsup):3.1 V
表面贴装:NO温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:1.778 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

M65617 数据手册

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MITSUBISHI ICs (TV)  
M65617SP  
PICTURE-IN-PICTURE SIGNAL PROCESSING  
SERIAL REGISTER INFORMATION (cont.)  
Sub-  
address  
Reference  
setting  
Bit No.  
Register name  
Function  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1/0  
1/0  
1/0  
0/0  
0/0  
1/0  
1/0  
0/0  
0
hp (0)  
Sample start position  
Fine adjustment; 70ns/step  
hp (1)  
hx (0)  
hx (1)  
05h  
06h  
07h  
08h  
09h  
0Ah  
Sample start position  
Rough adjustment;  
Formula: {4-hp<1:0>+(3Fh-hx<5:0>)×4}×70ns-2.5us  
hx (2)  
hx (3)  
hx (4)  
hx (5)  
contrast (0)  
contrast (1)  
contrast (2)  
contrast (3)  
contrast (4)  
contrast (5)  
contrast (6)  
free-run  
bgy (2)  
0
Luminance signal sub-DAC control;  
1V output at 40h, max. 1.8V output  
1V output from sync chip to white peak at 40h  
Luminance signal level during image period is 100/130 (IRE ratio) x 1V  
[40h setting with evaluation board]  
0
0
0
0
1
NB  
0
vcxo oscillation control; lock loop/self-propelled oscillation [0/1]  
0
bgy (3)  
Setting of frame and background luminance level; [8h setting in the case of black  
frame]  
0
bgy (4)  
1
bgy (5)  
0
ext-sync-sel (0)  
ext-sync-sel (1)  
lpf-sel (0)  
lpf-sel (1)  
bgby (0)  
bgby (1)  
bgby (2)  
bgry (0)  
bgry (1)  
bgry (2)  
mvc (0)  
Selection of sub-screen sync input; [Normally 0 setting]  
Digital [0 or 1], external pin input [2], internal analog [3]  
0
0
Selection of sub-screen luminance signal band [2 setting]  
2.3 [00b], 2.1 [01b], 1.6 [10b], 1.3 [11b]MHz  
1
0
Setting of background b-y level; 8 gradations  
0(min.)4(center)7(max.) (4 setting if colorless)  
0
1
0
Setting of background r-y level; 8 gradations  
0(min.)4(center)7(max.) (4 setting if colorless)  
0
1
0
Setting of noise mask gate range for sub-signal sync;  
48us [0], 44us [1], 53us [2], OFF [3] [0 setting]  
0
mvc (1)  
1
bstby (0)  
bstby (1)  
bstby (2)  
bstby (3)  
bstby (4)  
bstby (5)  
bstby (6)  
bstby (7)  
vxa (0)  
1
1
0
Setting of color signal output burst b-y level; 256 gradations  
00h(min.)80h(center)FFh(max.)  
1
0
1
0
0/0  
0/0  
0/0  
0/1  
0/0  
1/1  
0/0  
0/0  
vxa (1)  
vxa (2)  
vxa (3)  
Setting of display start position (vertical); {vxa<7.0>+17 or 16 (1st field)}line  
[20h/28h(1/9 - 1/16 sizes) when displayed at the upper left]  
vxa (4)  
vxa (5)  
vxa (6)  
vxa (7)  
6

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