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M5M29KT800AVP-80I PDF预览

M5M29KT800AVP-80I

更新时间： 2023-07-15 00:00:00
品牌 Logo 应用领域
三菱 - MITSUBISHI 光电二极管
页数 文件大小 规格书
22页 236K
描述
Flash, 512KX16, 80ns, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48

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M5M29KT800AVP-80I 数据手册

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MITSUBISHI LSIs  
M5M29KB/T800AVP  
8,388,608-BIT (1048,576-WORD BY 8-BIT / 524,288-WORD BY16-BIT)  
CMOS 5.0V-ONLY, BLOCK ERASE FLASH MEMORY  
SOFTWARE COMMAND DEFINITION  
Command List  
3rd - 257th bus cycles (Byte Mode)  
3rd - 129th bus cycles (Word Mode)  
1st bus cycle  
Address  
2nd bus cycle  
Address  
1)  
Data  
Data  
Data  
Command  
Read Array  
Mode  
Mode  
Mode  
Address  
(DQ7-0)  
(DQ7-0)  
(DQ15-0)  
(DQ7-0)  
(DQ15-0)  
FFH  
90H  
70H  
50H  
55H  
40H  
41H  
74H  
0EH  
20H  
B0H  
D0H  
71H  
77H  
A7H  
(DQ15-0)  
Write  
Write  
Write  
Write  
Write  
Write  
Write  
Write  
X
X
Bank  
2)  
2)  
Device Identifier  
Read  
Read  
IA  
ID  
SRD  
3)  
3)  
4)  
Bank  
Read Status Register  
Clear Status Register  
Clear Page Buffer  
X
X
1)  
6)  
7)  
6)  
1)  
1)  
Write  
Write  
Write  
Write  
X
D0H  
WD  
6)  
5)  
5)  
Bank(I)  
Byte/Word Program  
WA  
7)  
7)  
7)  
3)  
7)  
Bank  
Page Program  
Single Data Load to Page Buffer  
WA0  
WA  
WD0  
WD  
D0H  
D0H  
Write  
WAn  
WDn  
5)  
5)  
6)  
Bank(I)  
8)  
5)  
5)  
Page Buffer to Flash  
Bank(I)  
Write  
Write  
Write  
Write  
Write  
Write  
Write  
WA  
BA  
3)  
9)  
Bank  
Block Erase / Confirm  
Suspend  
3)  
Bank  
3)  
Bank  
Resume  
9)  
10)  
1)  
Read Lock Bit Status  
Lock Bit Program / Confirm  
Read  
Write  
Write  
BA  
X
Bank  
DQ6  
D0H  
D0H  
9)  
3)  
Write  
Write  
BA  
11)  
1)  
X
Erase All Unlocked Blocks  
X
1) In the word-wide mode, upper byte data (DQ8 - DQ15) is ignored.  
2) IA = ID Code Address : A0 = VIL (Manufacturer's Code) : A0 = VIH (Device Code), ID = ID Code.  
3) Bank = Bank Address (Bank(I) or Bank(II)). A18 - A15.  
4) SRD = Status Register Data.  
5) Byte/Word Program, Single Data Load and Page Buffer to Flash Command is valid for only Bank(I).  
6) WA = Write Address, WD = Write Data.  
7) WA0,WAn = Write Address, WD0,WDn = Write Data.  
BYTE# = VIL : Write Address and Write Data must be provided sequentially from 00H to FFH for A6 - A-1. Page size is 256Byte (256byte x 8bit),  
and also A18 - A7(Block Address, Page Address) must be valid.  
BYTE# = VIH : Write Address and Write Data must be provided sequentially from 00H to 7FH for A6 - A0. Page size is 128word (128word x 16bit),  
and also A18 - A7(Block Address, Page Address) must be valid.  
8) WA = Write Address.  
Upper page address, A18 - A7(Block Address, Page Address) must be valid.  
9) BA = Block Address : Bank(I) : A18 - A12.  
Bank(II) : A18 - A15.  
10) DQ6 provides Block Lock Status, DQ6 = 1 : Block Unlock, DQ6 = 0 : Block Locked.  
11) Read Status Register command (70H) is required to detect the completion of Erase All Unlocked Blocks. 70H command has to be written at least after 1.8s  
from issuing A7H.  
7
June 1998 , Rev.3.1  
1...45678910...22

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