Datasheet > M28C16-150N6T

M28C16-150N6T

更新时间： 2024-09-29 22:46:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
18页	130K
描述
16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION

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中文翻译

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数据手册

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M28C16-150N6T 数据手册

M28C16

16K (2K x 8) PARALLEL EEPROM

with SOFTWARE DATA PROTECTION

NOT FOR NEW DESIGN

FAST ACCESS TIME: 90ns

SINGLE 5V ± 10% SUPPLY VOLTAGE

LOW POWER CONSUMPTION

FAST WRITE CYCLE:

– 64 Bytes Page WriteOperation

– Byte or Page Write Cycle: 3ms Max

ENHANCED END OF WRITE DETECTION:

– Data Polling

PDIP24 (P)

PLCC32 (K)

– ToggleBit

PAGE LOAD TIMER STATUS BIT

HIGH RELIABILITYSINGLE POLYSILICON,

CMOS TECHNOLOGY:

– Endurance >100,000 Erase/Write Cycles

– Data Retention >40 Years

JEDEC APPROVED BYTEWIDE PIN OUT

SOFTWARE DATA PROTECTION

SO24 (MS)

300 mils

TSOP28 (N)

8 x13.4mm

M28C16 is replacedby the products

described on the document M28C16A

Figure 1. Logic Diagram

DESCRIPTION

The M28C16 is a 2K x 8 low power Parallel

EEPROMfabricatedwithSGS-THOMSONproprie-

tary single polysilicon CMOS technology. The de-

vice offers fast access time with low power

dissipation and requires a 5V power supply. The

circuit has been designed to offer a flexible micro-

controller interface featuring both hardware and

softwarehandshakingwith DataPollingandToggle

Bit. The M28C16 supports 64 byte page write op-

eration. A Software Data Protection (SDP) is also

possibleusing the standard JEDEC algorithm.

A0-A10

DQ0-DQ7

M28C16

Table 1. Signal Names

RB *

A0 - A10

Address Input

DQ0 - DQ7 Data Input / Output

Write Enable

Chip Enable

Output Enable

Ready / Busy

Supply Voltage

Ground

AI01518B

V_CC

V_SS

Note: * RB function is offered only with TSOP28 package.

November 1997

1/18

This is information on a product still in production but not recommended for new design.

12 3 4 5 6 7...18

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