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LY24C08SL PDF预览

LY24C08SL

更新时间: 2023-01-03 04:28:21
品牌 Logo 应用领域
台湾来扬 - LYONTEK 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
15页 212K
描述
EEPROM,

LY24C08SL 数据手册

 浏览型号LY24C08SL的Datasheet PDF文件第3页浏览型号LY24C08SL的Datasheet PDF文件第4页浏览型号LY24C08SL的Datasheet PDF文件第5页浏览型号LY24C08SL的Datasheet PDF文件第7页浏览型号LY24C08SL的Datasheet PDF文件第8页浏览型号LY24C08SL的Datasheet PDF文件第9页 
®
LY24C02/04/08/16  
2K/4K/8K/16K-bit 2-Wire Serial EEPROM  
Preliminary. 0.4  
The I2C-bus interface supports the following communication protocols:  
Bus not busy: The SDA and the SCL lines remain High level when the bus is not active.  
Start condition: Start condition is initiated by a High-to-Low transition of the SDA line while SCL remains  
High level. All bus commands must be preceded by a start condition.  
Stop condition: A stop condition is initiated by a Low-to-High transition of the SDA line while SCL remains  
High level. All bus operations must be completed by a stop condition  
Note: Data transmission sequence  
Data valid: Following a start condition, the data becomes valid if the data line remains stable for the duration  
of the High period of SCL. New data must be put onto the bus while SCL is Low. Bus timing is one clock  
pulse per data bit. The number of data bytes to be transferred is determined by the master device. The total  
number of bytes that can be transferred in one operation is theoretically unlimited.  
ACK (Acknowledge): An ACK signal indicates that a data transfer is completed successfully. The  
transmitter (the master or the slave) releases the bus after transmitting eight bits. During the 9th clock, which  
the master generates, the receiver pulls the SDA line low to acknowledge that it successfully received the  
eight bits of data (see Figure 3-8). But the slave does not send an ACK if an internal write cycle is still in  
progress.  
In data read operations, the slave releases the SDA line after transmitting 8 bits of data and then monitors  
the line for an ACK signal during the 9th clock period. If an ACK is detected, the slave will continue to  
transmit data. If an ACK is not detected, the slave terminates data transmission and waits for a stop condition  
to be issued by the master before returning to its stand-by mode.  
Note: Acknowledge response from receiver  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
40 Hsuch-Fu Rd., Hsinchu, Taiwan.  
TEL: 886-3-5165511  
FAX: 886-3-5165522  
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