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LTC6945 PDF预览

LTC6945

更新时间: 2024-09-27 12:00:39
品牌 Logo 应用领域
凌特 - Linear 驱动器转换器
页数 文件大小 规格书
36页 1390K
描述
Low Phase Noise, Dual Output Buffer/Driver/Logic Converter

LTC6945 数据手册

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LTC6957-1/LTC6957-2/  
LTC6957-3/LTC6957-4  
Low Phase Noise, Dual  
Output Buffer/Driver/  
Logic Converter  
FeaTures  
DescripTion  
n
Low Phase Noise Buffer/Driver  
The LTC®6957-1/LTC6957-2/LTC6957-3/LTC6957-4 is  
a family of very low phase noise, dual output AC signal  
buffer/driver/logic level translators. The input signal can  
n
Optimized Conversion of Sine Wave Signals to  
Logic Levels  
n
be a sine wave or any logic level (2V ). There are four  
Three Logic Output Types Available  
P-P  
members of the family that differ in their output logic  
signal type as follows:  
LVPECL  
LVDS  
– CMOS  
Additive Jitter 45fs  
LTC6957-1: LVPECL Logic Outputs  
n
(LTC6957-1)  
RMS  
LTC6957-2: LVDS Logic Outputs  
n
n
n
n
n
Frequency Range Up to 300MHz  
3.15V to 3.45V Supply Operation  
Low Skew 3ps Typical  
Fully Specified from –40°C to 125°C  
12-Lead MSOP and 3mm × 3mm DFN Packages  
LTC6957-3: CMOS Logic, In-Phase Outputs  
LTC6957-4: CMOS Logic, Complementary Outputs  
The LTC6957 will buffer and distribute any logic signal  
with minimal additive noise, however, the part really ex-  
cels at translating sine wave signals to logic levels. The  
early amplifier stages have selectable lowpass filtering  
to minimize the noise while still amplifying the signal to  
increaseitsslewrate. Thisinputstagefiltering/noiselimit-  
ing is especially helpful in delivering the lowest possible  
phase noise signal with slow slewing input signals such  
as a typical 10MHz sine wave system reference.  
applicaTions  
n
System Reference Frequency Distribution  
n
High Speed ADC, DAC, DDS Clock Driver  
n
Military and Secure Radio  
Low Noise Timing Trigger  
Broadband Wireless Transceiver  
High Speed Data Acquisition  
Medical Imaging  
Test and Measurement  
n
n
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Protected by U.S. Patents 7969189 and 8319551.  
n
n
Typical applicaTion  
3.3V  
0.1µF  
Additive Phase Noise at 100MHz  
–140  
SINGLE-ENDED SINE WAVE INPUT  
AT +7dBm (500mV  
)
RMS  
+
V
SD1  
FILTA = FILTB = GND  
FILTA  
–145  
–150  
–155  
–160  
–165  
FILTB  
TO PLL CHIPS  
OR SYSTEM  
SAMPLING CLOCKS  
OUT1  
100MHz  
LTC6957-2 (LVDS)  
LTC6957-4 (CMOS)  
+7dBm  
10nF  
+
SINE WAVE  
IN  
IN  
OCXO  
50Ω  
10nF  
OUT2  
LTC6957-3  
(CMOS)  
GND  
SD2  
LTC6957-1 (LVPECL)  
1k 10k  
OFFSET FREQUENCY (Hz)  
6957 TA01a  
100  
100k  
1M  
69571234 TA01b  
6957f  
1
For more information www.linear.com/LTC6957-1  

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