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LTC2953IDD-1-TRPBF PDF预览

LTC2953IDD-1-TRPBF

更新时间: 2024-02-11 03:10:29
品牌 Logo 应用领域
凌特 - Linear 监控控制器
页数 文件大小 规格书
20页 199K
描述
Push Button On/Off Controller with Voltage Monitoring

LTC2953IDD-1-TRPBF 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVSON,
针数:12Reach Compliance Code:compliant
风险等级:5.14可调阈值:YES
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:S-PDSO-N12
JESD-609代码:e3长度:3 mm
湿度敏感等级:1信道数量:1
功能数量:1端子数量:12
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:0.8 mm最大供电电压 (Vsup):27 V
最小供电电压 (Vsup):2.7 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.45 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

LTC2953IDD-1-TRPBF 数据手册

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LTC2953  
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VIN = 2.7V to 27V, unless otherwise noted (Note 2).  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
I
I
I
PFI Leakage Current  
V
V
= 0.5V  
= 27V  
2
10  
1
nA  
μA  
PFI(LKG)  
PFI  
PFI  
PFO Leakage Current  
V
PFO  
V
PFO  
= 1V  
= 40V  
2
2
2
10  
1
nA  
μA  
PFO(LKG)  
UVLO(LKG)  
UVLO Leakage Current  
V
UVLO  
V
UVLO  
= 0.5V  
= 27V  
10  
1
nA  
μA  
I
I
t
t
t
Vꢁ Input Leakage Current  
⎯ ⎯ ⎯  
Vꢁ = 0.5V  
= 3V  
10  
0.1  
nA  
μA  
μs  
Vꢁ(LKG)  
RST(LKG)  
PFI  
RST Output Leakage Current  
V
RST  
PFI Delay to PFO  
40  
100  
200  
250  
200  
260  
Reset Timeout Period  
140  
ms  
μs  
RST  
⎯ ⎯ ⎯  
Vꢁ Under Voltage Detect to RST  
Vꢁ Less Than Vꢁ  
By ꢁore Than 1ꢀ  
(TH)  
uv  
Note 1: Stresses beyond those listed under Absolute ꢁaximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
ꢁaximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 4: To manually force a release of the EN/EN pin, either PB or UVLO  
must be held low for at least t (internal default power down timer) +  
PD, ꢁin  
t
(adjustable by placing external capacitor at PDT pin).  
Note 5: The KILL turn on blanking timer period (t  
PDT  
) is the  
KILL, ON BLANK  
Note 2: All currents into pins are positive; all voltages are referenced to  
GND unless otherwise noted.  
Note 3: The Enable Lock Out time is designed to allow an application to  
waiting period immediately after enable output is asserted. This blanking  
time allows sufficient time for the DC/DC converter and the μP to perform  
power up tasks. The KILL, PB and UVLO inputs are ignored during this  
period. If KILL remains low at the end of this blanking period, the enable  
output is released, thus turning off system power.  
properly power down such that the next power up sequence starts from a  
consistent powered down configuration. PB is ignored during this lock out  
time. This time delay does not include t  
.
DB, ON  
2953f  
4

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