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LTC1669-1CS5#PBF

更新时间： 2024-01-29 02:50:57
品牌 Logo 应用领域
凌特 - Linear 转换器光电二极管
页数 文件大小 规格书
12页 186K
描述
LTC1669 - 10-Bit Rail-to-Rail Micropower DAC with I<sup>2</sup>C Interface; Package: SOT; Pins: 5; Temperature Range: 0&deg;C to 70&deg;C

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LTC1669-1CS5#PBF 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：VSSOP,
针数：5Reach Compliance Code：compliant
风险等级：5.1最大模拟输出电压：5.5 V
最小模拟输出电压：转换器类型：D/A CONVERTER
输入位码：BINARY输入格式：SERIAL
JESD-30 代码：R-PDSO-G5JESD-609代码：e3
长度：2.9 mm最大线性误差 (EL)：0.2441%
湿度敏感等级：1位数：10
功能数量：1端子数量：5
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：VSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1 mm标称安定时间 (tstl)：30 µs
标称供电电压：3 V表面贴装：YES
温度等级：COMMERCIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.95 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：1.625 mmBase Number Matches：1

LTC1669-1CS5#PBF 数据手册

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LTC1669  
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PIN FUNCTIONS  
SDA (Pin 1, Pin 1 on SOT-23): Serial Data Bidirectional  
Pin. Data is shifted into the SDA pin and acknowledged by  
the SDA pin. High impedance pin while data is shifted in.  
Open-drain N-channel output during acknowledgment.  
Requires a pull-up resistor or current source to VCC.  
VCC (Pin 5, Pin 4 on SOT-23): Power Supply. 2.7V ≤ VCC  
≤ 5.5V. Also used as the reference voltage input when the  
part is programmed to use VCC as the reference.  
AD0 (Pin 6): Slave Address Select Bit 0. Tie this pin to  
either VCC or GND to modify the corresponding bit of the  
LTC1669’s slave address.  
AD1 (Pin 2): Slave Address Select Bit 1. Tie this pin to  
either VCC or GND to modify the corresponding bit of the  
LTC1669’s slave address.  
GND (Pin 7, Pin 2 on SOT-23): System Ground.  
V
OUT (Pin 8, Pin 3 on SOT-23): Voltage Output. Buffered  
AD2 (Pin 3): Slave Address Select Bit 2. Tie this pin to  
either VCC or GND to modify the corresponding bit of the  
LTC1669’s slave address.  
rail-to-rail DAC output.  
SCL (Pin 4, Pin 5 on SOT-23): Serial Clock Input Pin. Data  
is shifted into the SDA pin at the rising edges of the clock.  
This high impedance pin requires a pull-up resistor or  
current source to VCC.  
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DEFINITIONS  
Differential Nonlinearity (DNL): The difference between  
the measured change and the ideal 1LSB change for any  
twoadjacentcodes.TheDNLerrorbetweenanytwocodes  
is calculated as follows:  
zero. The INL error at a given input code is calculated as  
follows:  
INL = [VOUT – VOS – (VFS – VOS)(code/1023)]/LSB  
Where VOUT is the output voltage of the DAC measured at  
the given input code.  
DNL = (∆VOUT – LSB)/LSB  
Where ∆VOUT is the measured voltage difference between  
two adjacent codes.  
Least Significant Bit (LSB): The ideal voltage difference  
between two successive codes.  
DigitalFeedthrough: Theglitchthatappearsattheanalog  
outputcausedbyACcouplingfromthedigitalinputswhen  
they change state. The area of the glitch is specified in  
(nV)(sec).  
LSB = VREF/1024  
Resolution (n): Defines the number of DAC output states  
(2n) that divide the full-scale range. Resolution does not  
imply linearity.  
Full-Scale Error (FSE): The deviation of the actual full-  
scale voltage from ideal. FSE includes the effects of offset  
and gain errors (see Applications Information).  
Voltage Offset Error (VOS): Nominally, the voltage at the  
output when the DAC is loaded with all zeros. A single  
supply DAC can have a true negative offset, but the output  
cannot go below zero (see Applications Information).  
Integral Nonlinearity (INL): The deviation from a straight  
line passing through the endpoints of the DAC transfer  
curve(EndpointINL).Becausetheoutputcannotgobelow  
zero, the linearity is measured between full scale and the  
lowestcodethatguaranteestheoutputwillbegreaterthan  
For this reason, single supply DAC offset is measured at  
the lowest code that guarantees the output will be greater  
than zero.  
1669f  
5
12345678...12

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