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LTC1668IG PDF预览

LTC1668IG

更新时间: 2024-01-03 22:41:16
品牌 Logo 应用领域
凌特 - Linear 转换器数模转换器光电二极管信息通信管理
页数 文件大小 规格书
16页 731K
描述
16-Bit, 50Msps DAC

LTC1668IG 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active包装说明:SSOP,
针数:28Reach Compliance Code:compliant
风险等级:5.14Is Samacsys:N
最大模拟输出电压:1 V最小模拟输出电压:-1 V
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, WORDJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:10.2 mm
最大线性误差 (EL):0.0122%湿度敏感等级:1
标称负供电电压:-5 V位数:16
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2 mm标称安定时间 (tstl):0.02 µs
标称供电电压:5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

LTC1668IG 数据手册

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LTC1668  
W U U  
U
APPLICATIO S I FOR ATIO  
For fixed reference voltage applications, CCOMP1 should  
be 0.1µF or more. The reference control loop small-signal  
bandwidthisapproximately1/(2π)CCOMP1 80or20kHz  
for CCOMP1 = 0.1µF.  
Theory of Operation  
The LTC1668 is a high speed current steering 16-Bit DAC  
made on an advanced BiCMOS process. Precision thin  
film resistors and well matched bipolar transistors result  
in excellent DC linearity and stability. A low glitch current  
switchingdesigngivesexcellentACperformanceatsample  
rates up to 50Msps. The device is complete with a 2.5V  
internal bandgap reference and edge triggered latches,  
and sets a new standard for DAC applications requiring  
very high dynamic range at output frequencies up to  
several megahertz.  
Internal Reference Output—REFOUT  
The onboard 2.5V bandgap voltage reference drives the  
REFOUT pin. It is trimmed and specified to drive a 2k  
resistor tied from REFOUT to IREFIN, corresponding to a  
1.25mA load (IOUTFS = 10mA). REFOUT has nominal  
output impedance of 6, or 0.24% per mA, so it must be  
buffered to drive any additional external load. A 0.1µF  
capacitor is required on the REFOUT pin for compensa-  
tion. Note that this capacitor is required for stability, even  
if the internal reference is not being used.  
Referring to the Block Diagram, the DAC contains an array  
of current sources that are steered to IOUTA or IOUTB with  
NMOS differential current switches. The four most signifi-  
cant bits, DB15 to DB12 are made up of 15 current  
segmentsofequalweight. Thelowerbits, DB11toDB0are  
binary weighted, using a combination of current scaling  
and a differential resistive attenuator ladder. All bits and  
segments are precisely matched, both in current weight  
forDClinearity, andinswitchtimingforlowglitchimpulse  
and low spurious tone AC performance.  
DAC Transfer Function  
The LTC1668 uses straight binary digital coding. The  
complementary current outputs, IOUT A and IOUT B, sink  
current from 0 to IOUTFS. For IOUTFS = 10mA (nominal),  
IOUT A swings from 0mA when all bits are low (i.e., Code =  
0) to 10mA when all bits are high (i.e., Code = 65535) (deci-  
mal representation). IOUT B is complementary to IOUT A  
IOUT A and IOUT B are given by the following formulas:  
.
Setting the Full-Scale Current, IOUTFS  
The full-scale DAC output current, IOUTFS, is nominally  
10mA, and can be adjusted down to 1mA. Placing a  
resistor, RSET, between the REFOUT pin, and the IREFIN pin  
sets IOUTFS as follows.  
IOUT A = IOUTFS • (DAC Code/65536)  
(2)  
(3)  
IOUT B = IOUTFS • (65535-DAC Code)/65536  
In typical applications, the LTC1668 differential output  
currents either drive a resistive load directly or drive an  
equivalent resistive load through a transformer, or as the  
feedback resistor of an I-to-V converter. The voltage  
outputs generated by the IOUT A and IOUT B output currents  
are then:  
The internal reference control loop amplifier maintains a  
virtual ground at IREFIN by servoing the internal current  
source, IINT, to sink the exact current flowing into IREFIN  
IINT is a scaled replica of the DAC current sources and  
IOUTFS = 8 • (IINT), therefore:  
.
IOUTFS = 8 • (IREFIN) = 8 • (VREF/RSET  
)
(1)  
VOUT A = IOUT A • RLOAD  
VOUT B = IOUT B • RLOAD  
The differential voltage is:  
VDIFF = VOUT A – VOUT B  
(4)  
(5)  
For example, if RSET = 2k and is tied to VREF = REFOUT =  
2.5V, IREFIN = 2.5/2k = 1.25mA and IOUTFS = 8 • (1.25mA)  
= 10mA.  
(6)  
The reference control loop requires a capacitor on the  
COMP1 pin for compensation. For optimal AC perfor-  
mance, CCOMP1 should be connected to VSS and be placed  
very close to the package (less than 0.1").  
= (IOUT A – IOUT B) • (RLOAD  
)
6

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