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LTC1067-50IGN#PBF PDF预览

LTC1067-50IGN#PBF

更新时间： 2024-01-09 12:00:24
品牌 Logo 应用领域
凌特 - Linear LTE光电二极管有源滤波器
页数 文件大小 规格书
20页 294K
描述
LTC1067 - Rail-to-Rail, Very Low Noise Universal Dual Filter Building Block; Package: SSOP; Pins: 16; Temperature Range: -40°C to 85°C

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LTC1067-50IGN#PBF 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：SSOP包装说明：SSOP, SSOP16,.25
针数：16Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.01有源滤波器类型：SWITCHED CAPACITOR FILTER
中心频率或截止频率最大范围：40 kHz中心频率或截止频率最小范围：0.001 kHz
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：4.9 mm湿度敏感等级：1
功能数量：2端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
阶次：2ND封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：260极和零点：2 AND 0
电源：3/5/+-5 V认证状态：Not Qualified
响应：UNIVERSAL座面最大高度：1.75 mm
子类别：Active Filters最大供电电流 (Isup)：4 mA
最大供电电压 (Vsup)：11 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：4.75 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30传递特性：RESISTOR PROGRAMMABLE
宽度：3.9116 mmBase Number Matches：1

LTC1067-50IGN#PBF 数据手册

 浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第12页浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第13页浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第14页浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第16页浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第17页浏览型号LTC1067-50IGN#PBF的Datasheet PDF文件第18页 
LTC1067/LTC1067-50  
U
W U U  
APPLICATIONS INFORMATION  
Figure 14 illustrates how a resistor adjusts the AGND  
voltage for use with a 3V/3.3V powered ADC with a full-  
scale input of 2.048V. As in the previous circuit, the  
resistorvaluewaschosencarefullytoassurethata2.048V  
input signal to the filter yields a full-scale reading from the  
ADC and a 0V input signal gives the lowest possible value.  
For this application, the power supply must be above 2.7V  
for an LTC1067-50 filter and above 3V for an LTC1067  
filter.  
obtain a demonstration board, call your local representa-  
tive or Linear Technology’s marketing department.  
The demonstration board has all integrated circuits, con-  
nectors and decoupling capacitors installed. The board is  
ready to be configured with the appropriate resistors and  
jumper connections.  
Therearetwosetsofpowersupplyconnections. Oneisfor  
the LTC1067/LTC1067-50 and the other is for the buffer-  
ing op amp on the board. Having separate connections  
gives the board the most flexibility. The two sets of  
supplies can be connected together if a common supply is  
desired.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
+
33.2k  
1%  
V
CLK  
NC  
AGND  
3V TO 3.6V  
(LTC1067)  
2.7V TO 3.6V  
(LTC1067-50)  
1µF  
+
–
V
V
SA  
LTC1067  
LTC1067-50  
SB  
LPB  
BPB  
When configuring the board for split supply operation, a  
jumper wire must be installed in the JPAGND position.  
This connects the AGND pin of the device to the ground  
plane of the board. The JPVNEG jumper must be left open.  
The power supply is then connected to V+, V– and GND  
turrets (all of the GND turrets on the board are the same).  
For single supply operation, insert a wire in the JPVNEG  
jumperandleavetheJPAGNDjumperopen.Thisconnects  
the V– pin to the board’s ground plane. The JPAGND  
jumper must be left open so that the on-chip resistor  
network can set the AGND potential at the midpoint of the  
supply. Connect the power supply to V+ and any GND  
turret. The V– turret can be left open or shorted to the  
adjacent GND turret. If the buffering op amp is run on the  
same single voltage supply, the VOA+ turret and the V+  
turrets must be connected together and the VOA– turret  
must be shorted to the adjacent GND turret.  
0.1µF  
LPA  
BPA  
HPA/NA  
INV A  
HPB/NB  
INV B  
1067 F14  
Figure 14. Power and AGND Connections for  
3V/3.3V ADC with 2.048V Full Scale  
Semi-Custom Filter Program  
Linear Technology has in place a program to deliver fully  
integratedfilters, customdesignedforanyspecifiedappli-  
cation. These semi-custom filters are based on an existing  
universal filter product with integrated, on-chip resistors.  
The final filter is then tested to the exact parameters  
defined for the application. The final result is a fully  
integrated, accurately tested solution in a smaller pack-  
age. For the LTC1067 or LTC1067-50 parts, a semi-  
customfiltercomesintheSO-8packageandrequiresonly  
aclockandadecouplingcapacitor. Formoredetailsonthe  
semi-custom filter program, contact Linear Technology’s  
marketing department.  
The J1 BNC connector is the clock input. There is a 200Ω  
series resistor connected between the connector and the  
CLK pin of the part. This resistor, coupled with the CLK  
pin’s input capacitance, slows down the rise and fall times  
oftheclocksignalanddecreaseshighfrequencycoupling.  
The clock input is not terminated to 50Ω or 75Ω. An  
external terminator should be used.  
Demonstration Board  
Jumpers JP51 and JP61 are connected in parallel with  
R51andR61respectively. JumperJP51connectstheLPA  
pin of the part with the SA pin. This can be used for  
operating modes 1 or 2. Alternatively, a 0Ω resistor in the  
R51 position fulfills the same requirement. The JP61  
jumper connects the SA pin of the part to the AGND pin.  
There is a demonstration board available for the LTC1067/  
LTC1067-50.Demonstrationboard150AhastheLTC1067  
part installed and the board 150B has the LTC1067-50  
installed. The schematic for the board is shown in Figure  
15 and the assembly drawing is shown in Figure 16. To  
15  
1...12131415161718...20

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LTC1067-50IS#TR Linear 暂无描述

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