LS4117, 4118, 4119
ULTRA-HIGH INPUT IMPEDANCE
N-CHANNEL JFET
Linear Integrated Systems
FEATURES
LOW POWER
IDSS<90 µA (2N4117)
IGSS<1 pA (2N4117A Series)
MINIMUM CIRCUIT LOADING
G
Case
G
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
@ 25°C (unless otherwise noted)
Gate-Source or Gate-Drain Voltage (NOTE 1) -40V
Gate-Current
Total Device Dissipation
(Derate 2mW/°C to 175°C)
Storage Temperature Range
Lead Temperature
D
S
3
4
2
1
50mA
C
S
D
300mW
-65°C to +175°C
TO-72
Bottom View
(1/16" from case for 10 seconds)
255°C
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
2N4117/A
2N4118
2N4119
FN4117/A
2N4118A
2N4119A
SYMBOL
CHARACTERISTICS
Gate Reverse Current
Standard only
MIN MAX MIN
MAX MIN MAX UNITS
CONDITIONS
IGSS
--
--
--
-10
-25
-1
--
--
--
-10
-25
-1
--
--
--
-10
-25
-1
pA
nA
pA
VGS= -20V VDS= 0
150°C
150°C
IGSS
Gate Reverse Current
VGS=-20V VDS= 0
"A" Series only
--
-2.5
--
--
-2.5
--
--
-2.5
--
nA
BVGSS
Gate-Source Breakdown Voltage -40
-40
-40
IG=-1µA
VDS= 0
V
VGS(off) Gate-Source Cutoff Voltage
IDSS Saturation Drain Current
(NOTE 2)
Common-Source Forward
-0.6
-1.8
-1
-3
-2
-6
VDS=10V ID= 1nA
VDS=10V VGS= 0
0.03
0.09 0.08
0.24
0.20 0.60
mA
FN4117/A 0.015
gfs
70
--
210
3
80
--
250
5
100
--
330
10
3
Transconductance
Common-Source Output
Conductance
(NOTE 2)
f=1kHz
µmho
gos
Ciss
Crss
Common-Source Input
Capacitance
--
3
--
3
--
VDS= 10V VGS= 0
f=1MHz
pF
Common-Source Reverse
Transfer Capacitance
--
1.5
--
1.5
--
1.5
NOTES:
1. Due to symmetrical geometry, these units may be operated with source and drain leads interchanged.
2. This parameter is measured during a 2 ms interval 100 ms after power is applied. (Not a JEDEC condition.)
Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261