Datasheet > LS1020ASE8KQB

LS1020ASE8KQB

更新时间： 2024-01-18 18:37:06

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
196页	1922K
描述
Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, 0 to 105C, Security enabled

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数据手册

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LS1020ASE8KQB 数据手册

LS1020A Ball Map and Pin List

10 11 12 13 14 15 16 17 18 19 20 21 22 23

SEE DETAIL A

SEE DETAIL B

SEE DETAIL C

SEE DETAIL D

10 11 12 13 14 15 16 17 18 19 20 21 22 23

DDR Interface 1

Interrupts

IFC

DUART

I2C

eSDHC

Trust

RTC

System Control

DIFF_SYSCLK

Serdes 1

ASLEEP

Debug

SYSCLK

DFT

DDR Clocking

JTAG

Analog Signals

Ethernet Cont. 2

Ground

USB PHY

QE TDM

Reserved

Ethernet MI 1

eSDHC

Ethernet Cont. 1

Power

Ethernet Cont. 3

No Connects

Figure 2. Complete BGA Map for the LS1020A

QorIQ LS1020A Data Sheet, Rev. 3, 05/2016

NXP Semiconductors

1 2 3 456 7 8...196

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与LS1020ASE8KQB相关器件

型号	品牌	描述	获取价格	数据表
LS1020ASN7HNB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security disabled	获取价格
LS1020ASN7KQB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, 0 to 105C, Security disabled	获取价格
LS1020ASN7MQB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, 0 to 105C, Security disabled	获取价格
LS1020AXE7HNB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, -40 to 105C, Security enabled	获取价格
LS1020AXE7KQB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, -40 to 105C, Security enabled	获取价格
LS1020AXE7MQB	NXP	Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, -40 to 105C, Security enabled	获取价格