Table of Contents
1 Introduction.......................................................................................... 3
3.20 SPI interface.............................................................................. 127
3.21 QuadSPI interface......................................................................133
3.22 Enhanced secure digital host controller (eSDHC).....................135
3.23 JTAG controller.........................................................................144
3.24 I2C interface.............................................................................. 147
3.25 GPIO interface...........................................................................150
3.26 GIC interface............................................................................. 152
3.27 High-speed serial interfaces (HSSI).......................................... 154
4 Hardware design considerations...........................................................175
4.1 Power supply design..................................................................175
4.2 Decoupling recommendations...................................................180
4.3 SerDes block power supply decoupling recommendations.......181
4.4 Connection recommendations................................................... 181
4.5 Thermal......................................................................................186
4.6 Recommended thermal model...................................................186
4.7 Thermal management information............................................ 187
5 Package information.............................................................................189
5.1 Mechanical dimensions of the FC-PBGA................................. 189
6 Security fuse processor.........................................................................191
7 Ordering information............................................................................191
7.1 Part numbering nomenclature....................................................191
7.2 Orderable part numbers addressed by this document................192
8 Revision history....................................................................................193
2 Pin assignments....................................................................................4
2.1 LS1020A Ball Map and Pin List............................................... 4
3 Electrical characteristics.......................................................................48
3.1 Overall DC electrical characteristics.........................................48
3.2 Power sequencing......................................................................54
3.3 Power-down requirements.........................................................58
3.4 Power characteristics.................................................................58
3.5 I/O DC power supply recommendation.....................................60
3.6 Power-on ramp rate................................................................... 63
3.7 Input clocks............................................................................... 63
3.8 RESET initialization..................................................................70
3.9 DDR3L and DDR4 SDRAM controller.................................... 71
3.10 DUART interface...................................................................... 77
3.11 Ethernet interface, Ethernet management interface, IEEE Std
1588........................................................................................... 79
3.12 QUICC engine specifications....................................................96
3.13 USB 2.0 interface...................................................................... 102
3.14 USB 3.0 interface...................................................................... 105
3.15 Integrated flash controller (IFC)................................................109
3.16 LPUART interface.....................................................................118
3.17 Flextimer interface.....................................................................120
3.18 SAI/I2S interface.......................................................................122
3.19 SPDIF interface......................................................................... 125
QorIQ LS1020A Data Sheet, Rev. 3, 05/2016
2
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