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LPC55S16JBD100 PDF预览

LPC55S16JBD100

更新时间: 2024-01-18 18:35:25
品牌 Logo 应用领域
恩智浦 - NXP 微控制器
页数 文件大小 规格书
124页 4776K
描述
High Efficiency Arm Cortex-M33-based Microcontroller

LPC55S16JBD100 数据手册

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LPC55S1x/LPC551x  
32-bit Arm Cortex®-M33, TrustZone, PRINCE, CASPER, 96 KB  
SRAM; 256 KB flash, USB HS, Flexcomm Interface, CAN FD,  
32-bit counter/ timers, SCTimer/PWM, PLU, 16-bit 2.0  
Msamples/sec ADC, Comparator, Temperature Sensor, AES,  
PUF, SHA, CRC, RNG  
Rev. 1.0 — 3 March 2020  
Product data sheet  
1. General description  
The LPC55S1x/LPC551x is an ARM Cortex-M33 based microcontroller for embedded  
applications. These devices include CASPER Crypto engine, up to 256 KB on-chip flash,  
up to 96 KB of on-chip SRAM, PRINCE module for on-the-fly flash encryption/decryption,  
high-speed/full-speed USB host and device interface with crystal-less operation for  
full-speed, CAN FD, five general-purpose timers, one SCTimer/PWM, one RTC/alarm  
timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), nine  
flexible serial communication peripherals (which can be configured as a USART, SPI, high  
speed SPI, I2C, or I2S interface), Programmable Logic Unit (PLU), one 16-bit 2.0  
Msamples/sec ADC, comparator, and temperature sensor.  
The ARM Cortex-M33 provides a security foundation, offering isolation to protect valuable  
IP and data with TrustZone® technology. It simplifies the design and software  
development of digital signal control systems with the integrated digital signal processing  
(DSP) instructions. To support security requirements, the LPC55S1x/LPC551x also offers  
support for secure boot, HASH, AES, RSA, UUID, dynamic encrypt and decrypt, debug  
authentication, and TBSA compliance.  
2. Features and benefits  
ARM Cortex-M33 core (r0p4):  
Running at a frequency of up to 150 MHz.  
TrustZone®, Floating Point Unit (FPU) and Memory Protection Unit (MPU).  
ARM Cortex M33 built-in Nested Vectored Interrupt Controller (NVIC).  
Non-maskable Interrupt (NMI) input with a selection of sources.  
Serial Wire Debug with eight breakpoints and four watch points. Includes Serial  
Wire Output for enhanced debug capabilities.  
System tick timer.  
CASPER Crypto co-processor is provided to enable hardware acceleration for various  
functions required for certain asymmetric cryptographic algorithms, such as, Elliptic  
Curve Cryptography (ECC).  

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