Datasheet > LPC55S66JEV98

LPC55S66JEV98

更新时间： 2024-03-03 10:08:47

品牌	Logo	应用领域
恩智浦 - NXP		微控制器
页数	文件大小	规格书
140页	3102K
描述
High Efficiency Arm^® Cortex^®-M33-Based Microcontroller Family

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LPC55S66JEV98 数据手册

LPC55S6x

32-bit Arm Cortex^®-M33; M33 coprocessor, TrustZone,

PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS,

Flexcomm Interface, SDIO, 32-bit counter/ timers,

SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC,

Comparator, Temperature Sensor, AES, PUF, SHA, CRC, RNG

Rev. 2.4 — 8 December 2022

Product data sheet

1. General description

The LPC55S6x is an ARM Cortex-M33 based microcontroller for embedded applications.

These devices include an ARM Cortex-M33 coprocessor, CASPER Crypto/FFT engine,

PowerQuad hardware accelerator for DSP functions, up to 320 KB of on-chip SRAM, up

to 640 KB on-chip flash, PRINCE module for on-the-fly flash encryption/decryption,

high-speed and full-speed USB host and device interface with crystal-less operation for

full-speed, SD/MMC/SDIO interface, five general-purpose timers, one SCTimer/PWM,

one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer

(WWDT), nine flexible serial communication peripherals (which can be configured as a

USART, SPI, high speed SPI, I²C, or I²S interface), Programmable Logic Unit (PLU), one

16-bit 1.0 Msamples/sec ADC capable of simultaneous conversions.

The ARM Cortex-M33 provides a security foundation, offering isolation to protect valuable

IP and data with TrustZone® technology. It simplifies the design and software

development of digital signal control systems with the integrated digital signal processing

(DSP) instructions. To support security requirements, the LPC55S6x also offers support

for secure boot, HASH, AES, RSA, UUID, DICE, dynamic encrypt and decrypt, debug

authentication, and TBSA compliance.

2. Features and benefits

 ARM Cortex-M33 core (CPU0, r0p3):

 Running at a frequency of up to 150 MHz (device revision 1B only).

 TrustZone®, Floating Point Unit (FPU) and Memory Protection Unit (MPU).

 ARM Cortex M33 built-in Nested Vectored Interrupt Controller (NVIC).

 Non-maskable Interrupt (NMI) input with a selection of sources.

 Serial Wire Debug with eight breakpoints and four watch points. Includes Serial

Wire Output for enhanced debug capabilities.

 System tick timer.

 The configuration of this instance includes MPU, FPU, DSP, ETM, and Trustzone.

 ARM Cortex-M33 co-processor (CPU1, r0p3):

 Running at a CPU frequency of up to 150 MHz (device revision 1B only).

 The configuration of this instance does not include MPU, FPU, DSP, ETM, and

Trustzone.

 System tick timer.

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