Datasheet > LPC11U67JBD64

LPC11U67JBD64

更新时间： 2024-09-28 02:52:07

品牌	Logo	应用领域
恩智浦 - NXP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器静态存储器
页数	文件大小	规格书
97页	3036K
描述
32-bit ARM Cortex-M0 microcontroller; up to 256 KB flash and 36 KB SRAM; 4 KB EEPROM; USB; 12-bit ADC

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LPC11U67JBD64 数据手册

LPC11U6x

32-bit ARM Cortex-M0+ microcontroller; up to 256 KB flash

and 36 KB SRAM; 4 KB EEPROM; USB; 12-bit ADC

Rev. 1.5 — 12 August 2020

Product data sheet

1. General description

The LPC11U6x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at

CPU frequencies of up to 50 MHz. The LPC11U6x support up to 256 KB of flash memory,

a 4 KB EEPROM, and 36 KB of SRAM.

The ARM Cortex-M0+ is an easy-to-use, energy-efficient core using a two-stage pipeline

and fast single-cycle I/O access.

The peripheral complement of the LPC11U6x includes a DMA controller, a CRC engine,

one full-speed USB device controller with XTAL-less low-speed mode, two I²C-bus

interfaces, up to five USARTs, two SSP interfaces, PWM/timer subsystem with six

configurable multi-purpose timers, a Real-Time Clock, one 12-bit ADC, temperature

sensor, function-configurable I/O ports, and up to 80 general-purpose I/O pins.

For additional documentation related to the LPC11U6x parts, see Section 17

“References”.

2. Features and benefits

 System:

 ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz

with single-cycle multiplier and fast single-cycle I/O port.

 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

 AHB Multilayer matrix.

 System tick timer.

 Serial Wire Debug (SWD) and JTAG boundary scan modes supported.

 Micro Trace Buffer (MTB) supported.

 Memory:

 Up to 256 KB on-chip flash programming memory with page erase.

 Up to 32 KB main SRAM.

 Up to two additional SRAM blocks of 2 KB each.

 Up to 4 KB EEPROM.

 ROM API support:

 Boot loader.

 USART drivers.

 I2C drivers.

 USB drivers.

 DMA drivers.

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