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LPC11E67JBD64 PDF预览

LPC11E67JBD64

更新时间: 2024-01-02 11:48:11
品牌 Logo 应用领域
恩智浦 - NXP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器静态存储器
页数 文件大小 规格书
90页 2919K
描述
32-bit ARM Cortex-M0 microcontroller; up to 256 kB flash and 36 kB SRAM; 4 kB EEPROM; 12-bit ADC

LPC11E67JBD64 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFP包装说明:QFP, QFP64,.47SQ,20
针数:64Reach Compliance Code:compliant
风险等级:2.31具有ADC:YES
地址总线宽度:位大小:32
CPU系列:CORTEX-M0最大时钟频率:25 MHz
DMA 通道:YES外部数据总线宽度:
JESD-30 代码:S-PQFP-G64长度:10 mm
湿度敏感等级:2I/O 线路数量:50
端子数量:64最高工作温度:105 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:3.3 V
认证状态:Not QualifiedRAM(字节):20480
ROM(单词):131072ROM可编程性:FLASH
速度:50 MHz子类别:Microcontrollers
最大供电电压:3.6 V最小供电电压:2.4 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

LPC11E67JBD64 数据手册

 浏览型号LPC11E67JBD64的Datasheet PDF文件第2页浏览型号LPC11E67JBD64的Datasheet PDF文件第3页浏览型号LPC11E67JBD64的Datasheet PDF文件第4页浏览型号LPC11E67JBD64的Datasheet PDF文件第5页浏览型号LPC11E67JBD64的Datasheet PDF文件第6页浏览型号LPC11E67JBD64的Datasheet PDF文件第7页 
LPC11E6x  
32-bit ARM Cortex-M0+ microcontroller; up to 256 kB flash  
and 36 kB SRAM; 4 kB EEPROM; 12-bit ADC  
Rev. 1.5 — 12 August 2020  
Product data sheet  
1. General description  
The LPC11E6x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at  
CPU frequencies of up to 50 MHz. The LPC11E6x support up to 256 KB of flash memory,  
a 4 KB EEPROM, and 36 KB of SRAM.  
The ARM Cortex-M0+ is an easy-to-use, energy-efficient core using a two-stage pipeline  
and fast single-cycle I/O access.  
The peripheral complement of the LPC11E6x includes a DMA controller, a CRC engine,  
two I2C-bus interfaces, up to five USARTs, two SSP interfaces, PWM/timer subsystem  
with six configurable multi-purpose timers, a Real-Time Clock, one 12-bit ADC,  
temperature sensor, function-configurable I/O ports, and up to 80 general-purpose I/O  
pins.  
For additional documentation related to the LPC11E6x parts, see Section 18  
“References”.  
2. Features and benefits  
System:  
ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz  
with single-cycle multiplier and fast single-cycle I/O port.  
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).  
AHB Multilayer matrix.  
System tick timer.  
Serial Wire Debug (SWD) and JTAG boundary scan modes supported.  
Micro Trace Buffer (MTB) supported.  
Memory:  
Up to 256 KB on-chip flash programming memory with page erase.  
Up to 32 KB main SRAM.  
Up to two additional SRAM blocks of 2 KB each.  
Up to 4 KB EEPROM.  
ROM API support:  
Boot loader.  
USART drivers.  
I2C drivers.  
DMA drivers.  
Power profiles.  
Flash In-Application Programming (IAP) and In-System Programming (ISP).  

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