Datasheet > LP87C51FA16

LP87C51FA16

更新时间： 2024-02-18 20:44:01

品牌	Logo	应用领域
英特尔 - INTEL		可编程只读存储器微控制器光电二极管
页数	文件大小	规格书
18页	254K
描述
Microcontroller, 8-Bit, OTPROM, 16MHz, CMOS, PDIP40, PLASTIC, DIP-40

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LP87C51FA16 数据手册

AUTOMOTIVE 87C51FA/FB/FC/FC-20

While the device is in ONCE Mode, the Port 0 pins

float, and the other port pins and ALE and PSEN are

weakly pulled high. The oscillator circuit remains ac-

tive. While the 87C51FA/FB/FC is in this mode, an

emulator or test CPU can be used to drive the circuit.

Normal operation is restored when a normal reset is

applied.

DESIGN CONSIDERATION

When the Idle mode is terminated by a hardware

reset, the device normally resumes program execu-

tion, from where it left off, up to two machine cycles

before the internal reset algorithm takes control. On-

chip hardware inhibits access to internal RAM in this

event, but access to the port pins is not inhibited. To

eliminate the possibility of an unexpected write when

Idle is terminated by reset, the instruction following

the one that invokes Idle should not be one that

writes to a port pin or to external memory.

RFI REDUCTION MODE

The RFI reduction feature can be used only if exter-

nal program memory is not required since this mode

disables the ALE pin during instruction code fetches.

By writing a logical one to the LSB of the Auxiliary

struction code fetches and the output is weakly held

high. When a logical zero is written, the ALE pin is

enabled allowing it to generate the Address Latch

Enable signal. This bit is cleared by reset. Once dis-

abled, ALE remains disabled until it is reset by soft-

ware or until a hardware reset occurs.

ONCE MODE

The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates

testing and debugging of systems using the

87C51FA/FB/FC without removing it from the cir-

cuit. The ONCE Mode is invoked by:

1. Pull ALE low while the device is in reset and

PSEN is high;

2. Hold ALE low as RST is deactivated.

Table 2. Status of the External Pins during Idle and Power Down

Program

Memory

Mode

Idle

ALE

PSEN

PORT0

PORT1

PORT2

PORT3

Internal

External

Internal

External

Data

Float

Data

Float

Data

Address

Data

Idle

Power Down

Data

NOTE:

For more detailed information on the reduced power modes refer to current Embedded Applications Handbook, and Applica-

tion Note AP-252, ‘‘Designing with the 80C51BH.’’

1...4 5 678 9 10...18

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