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LNK403EG

更新时间: 2024-02-21 00:21:12
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 驱动器
页数 文件大小 规格书
20页 2117K
描述
LinkSwitch-PH LED Driver IC Family

LNK403EG 技术参数

是否Rohs认证: 符合生命周期:Not Recommended
包装说明:,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.67接口集成电路类型:LED DISPLAY DRIVER
JESD-609代码:e3峰值回流温度(摄氏度):NOT SPECIFIED
端子面层:MATTE TIN处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

LNK403EG 数据手册

 浏览型号LNK403EG的Datasheet PDF文件第4页浏览型号LNK403EG的Datasheet PDF文件第5页浏览型号LNK403EG的Datasheet PDF文件第6页浏览型号LNK403EG的Datasheet PDF文件第8页浏览型号LNK403EG的Datasheet PDF文件第9页浏览型号LNK403EG的Datasheet PDF文件第10页 
LNK403-409/413-419  
7 W High Power Factor Non-Dimmable LED Driver  
Design Example with Enhanced Line Regulation  
pin provides excellent line regulation over the entire 90 VAC to  
265 VAC input range.  
The circuit schematic in Figure 7 shows a high power-factor  
LED driver based on a LNK413EG from the LinkSwitch-PH  
family of devices. It was optimized to drive an LED string at a  
voltage of 21 V with a constant current of 0.33 A, ideal for  
PAR20/PAR30 lamp retro-fit applications. The design operates  
over the universal input voltage range of 90 VAC to 265 VAC  
and is a non-dimming application. A non-dimming application  
has tighter output current variation with changes in the line  
voltage than a dimming application. It’s key to note that, although  
not specified for dimming, no circuit damage will result if the  
end user does operate the design with a phase controlled  
dimmer.  
The VOLTAGE MONITOR pin current is also used by the device  
to set the line input overvoltage and undervoltage protection  
thresholds.  
Diode D1 and VR1 clamp the drain voltage to a safe level due to  
the effects of leakage inductance. A Zener clamp was selected  
for lowest component count and highest efficiency. Diode D5 is  
necessary to prevent reverse current from flowing through U1  
during the period when the AC input voltage is lower than the  
reflected output voltage (VOR). A space efficient RM6 core was  
selected for this design. The RM core geometry helps  
minimizes audible noise but requires the use of flying leads to  
meet safety spacing requirements.  
Circuit Description  
Diode D3, C6, R5, R9 and R18 create the primary bias supply  
from an auxiliary winding on the transformer. Resistor R5  
provides filtering of leakage inductance generated voltage  
spikes to improve tracking of the bias and output voltages. It  
also forms a pole with C6 at ~100 Hz. Resistors R9 and R18  
act as a small load to ensure that the bias voltage collapses  
during output short-circuit when U1 enters auto-restart  
operation to protect the supply.  
Input Stage  
Fuse F1 provides protection from component failures while RV1  
provides a clamp during differential line surges, keeping the  
peak drain voltage of U1 below the 725 V rating of the internal  
power FET. Bridge rectifier BR1 rectifies the AC line voltage.  
EMI filtering is provided by L1-L3, C2 together with the safety  
rated Y class capacitor (C7) that bridges the safety isolation  
barrier between primary and secondary. Resistor R2 and R3  
act to damp any resonances formed between L1, L2, C2 and  
the AC line impedance. A small bulk capacitor (C3) is required  
to provide a low impedance source for the primary switching  
current. The maximum value of C2 and C3 is limited in order to  
maintain a power factor of greater than 0.9.  
Output overvoltage and load disconnection protection is  
provided by D8, C14, R24, VR3, C15, R23 and Q2. Should the  
output LED load become disconnected the output voltage will  
rise causing an associated rise in the bias winding voltage  
across C14. Once this exceeds the voltage rating of VR3, Q2  
turns on pulling down the FEEDBACK pin of U1 and initiating  
auto-restart operation. Once in auto-restart the low duty cycle  
of operation (~3%) together with the small pre-load on the  
output prevents the output voltage rising to a high level. Once  
the output load is reconnected normal operation resumes.  
LinkSwitch-PH Primary  
To provide peak line voltage information to U1 the incoming  
rectified AC peak charges C8 via D6. This is then fed into the  
VOLTAGE MONITOR pin of U1 as a current via R4, R7 and R8.  
The VOLTAGE MONITOR pin current and the FEEDBACK pin  
current are used internally to control the average output LED  
current. The combined value of R4, R7 and R8 (3.909 MW)  
and R11, R12 (1.402 MW) connected to the VOLTAGE MONITOR  
Capacitor C12 provides local decoupling for the BYPASS pin of  
U1 which is the supply pin for the internal controller. During  
C5  
C4  
R6  
20 k  
150 µF 150 µF  
21 V, 330 mA  
35 V  
35 V  
FL1  
1
FL2  
L3  
1000 µH  
D2  
MBRS4201T3G  
D6  
DL4007  
VR1  
P6KE200A  
FL3  
6
RTN  
D1  
UF4007  
R5  
75 Ω  
C6  
D3  
DL4936  
22 µF  
R4  
50 V  
2 MΩ  
BR1  
DF06S-E3/45  
600 V  
2
R2  
1%  
1 kΩ  
R18  
R9  
T1  
RM6  
R7  
1 MΩ  
1%  
F1  
3.15 A  
10 k10 kΩ  
L
D5  
L1  
R8  
909 kΩ  
1%  
C3  
100 nF  
400 V  
C8  
1 µF  
400 V  
ES1D  
1000 µH  
C2  
90 - 265  
VAC  
22 nF  
D4  
RV1  
275 VAC  
1N4148  
275 VAC  
L2  
1000 µH  
R10  
3 kΩ  
D
S
V
R15  
150 kΩ  
D8  
R11  
1.0 MΩ  
1%  
N
CONTROL  
BAV21WS-7-F  
LinkSwitch-PH  
U1  
LNK413EG  
BP  
R3  
1 kΩ  
VR3  
ZMM5259B-7  
39 V  
Q2  
MMBT3904  
R
FB  
R12  
402 kΩ  
1%  
R19  
24.9 kΩ  
1%  
C14  
1 µF  
50 V  
C15  
100 nF  
50 V  
C12  
R24  
10 kΩ  
R23  
1 kΩ  
10 µF  
10 V  
C7  
2.2 nF  
250 VAC  
PI-5991-101210  
Figure 8. Schematic of an Isolated, Non-Dimmable, High Power Factor, Universal Input, 7 W LED Driver.  
7
www.powerint.com  
Rev. D 08/11  

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