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LNK363GN-TL PDF预览

LNK363GN-TL

更新时间: 2024-01-09 14:27:13
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 开关光电二极管
页数 文件大小 规格书
16页 783K
描述
IC OFFLINE SWIT HV 8SMD

LNK363GN-TL 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:SOP,
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:0.86其他特性:REQUIRES AN AC SUPPLY OF 85 TO 265 V
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制技术:PULSE WIDTH MODULATION
JESD-30 代码:R-PDSO-G7长度:9.575 mm
功能数量:1端子数量:7
最高工作温度:125 °C最低工作温度:-40 °C
最大输出电流:0.4 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.98 mm
表面贴装:YES切换器配置:SINGLE
最大切换频率:140 kHz温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

LNK363GN-TL 数据手册

 浏览型号LNK363GN-TL的Datasheet PDF文件第2页浏览型号LNK363GN-TL的Datasheet PDF文件第3页浏览型号LNK363GN-TL的Datasheet PDF文件第4页浏览型号LNK363GN-TL的Datasheet PDF文件第6页浏览型号LNK363GN-TL的Datasheet PDF文件第7页浏览型号LNK363GN-TL的Datasheet PDF文件第8页 
LNK362-364  
TheLinkSwitch-XTiscompletelyself-poweredfromtheDRAIN  
pin, requiring only a small ceramic capacitor C3 connected to  
the BYPASS pin. No auxiliary winding on the transformer is  
required.  
2. For designs where PO 2 W, a two-layer primary should be  
used to ensure adequate primary intra-winding capacitance  
in the range of 25 pF to 50 pF.  
3. For designs where 2 < PO 2.5 W, a bias winding should be  
added to the transformer using a standard recovery rectier  
diode to act as a clamp. This bias winding may also be used  
to externally power the device by connecting a resistor from  
thebias-windingcapacitortotheBYPASSpin.Thisinhibits  
the internal high-voltage current source, reducing device  
dissipation and no-load consumption.  
Key Application Considerations  
LinkSwitch-XT Design Considerations  
Output Power Table  
Thedatasheetmaximumoutputpowertable(Table1)represents  
the maximum practical continuous output power level that can  
be obtained under the following assumed conditions:  
4. For designs where PO > 2.5 W Clampless designs are not  
practical and an external RCD or Zener clamp should be  
used.  
5. Ensurethatworst-casehighline,peakdrainvoltageisbelow  
the BVDSS specication of the internal MOSFETand ideally  
650 V to allow margin for design variation.  
1. TheminimumDCinputvoltageis90Vorhigherfor85VAC  
input, or 240 V or higher for 230 VAC input or 115 VAC  
with a voltage doubler. The value of the input capacitance  
should be large enough to meet these criteria for AC input  
designs.  
†For 110 VAC only input designs it may be possible to extend  
the power range of Clampless designs to include the LNK363.  
However, the increased leakage ringing may degrade EMI  
performance.  
2. Secondary output of 6 V with a fast PN rectier diode.  
3. Assumed efciency of 70%.  
4. Voltage only output (no secondary-side constant current  
circuit).  
**VOR isthesecondaryoutputplusoutputdiodeforwardvoltage  
drop that is reected to the primary via the turns ratio of the  
transformer during the diode conduction time. The VOR adds  
to the DC bus voltage and the leakage spike to determine the  
peak drain voltage.  
5. Discontinuous mode operation (KP >1).  
6. A primary clamp (RCD or Zener) is used.  
7. The part is board mounted with SOURCE pins soldered  
to a sufcient area of copper to keep the SOURCE pin  
temperature at or below 100 °C.  
8. Ambient temperature of 50 °C for open frame designs  
and an internal enclosure temperature of 60 °C for adapter  
designs.  
Audible Noise  
The cycle skipping mode of operation used in LinkSwitch-XT  
can generate audio frequency components in the transformer.  
To limit this audible noise generation, the transformer should  
be designed such that the peak core ux density is below  
1500 Gauss (150 mT). Following this guideline and using the  
standard transformer production technique of dip varnishing  
practically eliminates audible noise. Vacuum impregnation  
of the transformer should not be used due to the high primary  
capacitanceandincreasedlossesthatresult.Higheruxdensities  
are possible, however careful evaluation of the audible noise  
performance should be made using production transformer  
samples before approving the design.  
Below a value of 1, KP is the ratio of ripple to peak primary  
current.Above a value of 1, KP is the ratio of primary MOSFET  
OFF time to the secondary diode conduction time. Due to  
the ux density requirements described below, typically a  
LinkSwitch-XT design will be discontinuous, which also has  
the benets of allowing lower cost fast (instead of ultra-fast)  
output diodes and reducing EMI.  
Clampless Designs  
Clampless designs rely solely on the drain node capacitance  
to limit the leakage inductance induced peak drain-to-source  
voltage. Therefore, the maximum AC input line voltage, the  
value of VOR, the leakage inductance energy, a function of  
leakage inductance and peak primary current, and the primary  
winding capacitance determine the peak drain voltage. With no  
signicant dissipative element present, as is the case with an  
external clamp, the longer duration of the leakage inductance  
ringing can increase EMI.  
Ceramic capacitors that use dielectrics, such as Z5U, when  
used in clamp circuits may also generate audio noise. If this is  
the case, try replacing them with a capacitor having a different  
dielectric or construction, for example a lm type.  
LinkSwitch-XT Layout Considerations  
See Figure 6 for a recommended circuit board layout for  
LinkSwitch-XT (P & G package).  
The following requirements are recommended for a universal  
input or 230 VAC only Clampless design:  
Single Point Grounding  
Useasinglepointgroundconnectionfromtheinputltercapacitor  
to the area of copper connected to the SOURCE pins.  
1. A Clampless design should only be used for PO 2.5 W,  
using the LNK362and a VOR** 90 V.  
5
Rev. E 11/08  

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