Datasheet > LMUN2110LT1G

LMUN2110LT1G

更新时间： 2024-01-21 20:49:28

品牌	Logo	应用领域
雷卯电子 - LEIDITECH		晶体管
页数	文件大小	规格书
8页	644K
描述
PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network

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技术参数
数据手册

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LMUN2110LT1G 技术参数

是否Rohs认证：	符合	生命周期：	Contact Manufacturer
包装说明：	,	Reach Compliance Code：	unknown
风险等级：	5.84	最大集电极电流 (IC)：	0.1 A
最小直流电流增益 (hFE)：	80	元件数量：	1
极性/信道类型：	PNP	最大功率耗散 (Abs)：	0.4 W
子类别：	BIP General Purpose Small Signal	表面贴装：	YES
晶体管元件材料：	SILICON

LMUN2110LT1G 数据手册

LMUN21xxLT1G

SERIES

Bias Resistor Transistors

PNP Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base-emitter

resistor. The BRT eliminates these individual components by

integrating them into a single device. The use of a BRT can reduce

both system cost and board space. The device is housed in the SOT-23

package which is designed for low power surface mount applications.

SOT-23

PIN 3

COLLECTOR

(OUTPUT)

R₁

R₂

PIN 1

BASE

(INPUT)

PIN 2

EMITTER

• ^{Simplifies Circuit Design}

• Reduces Board Space

• ^{Reduces Component Count}

(GROUND)

• ^{The SOT-23 package can be soldered using wave or reflow. The}

modified gull-winged leads absorb thermal stress during soldering

eliminating the possibility of damage to the die.

• ^{Available in 8 mm embossed tape and reel. Use the Device Number}

to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the

Device Number to order the 13 inch/10,000 unit reel.

We declare that the material of product

compliance with RoHS requirements.

•

MAXIMUM RATINGS (T_A= 25°C unless otherwise noted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

V_CBO

V_CEO

I_C

Value

Unit

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Total Device Dissipation

T_A= 25°C

Derate above 25°C

P_D

246 (Note 1.)

400 (Note 2.)

1.5 (Note 1.)

2.0 (Note 2.)

°C/W

°C

Thermal Resistance –

Junction-to-Ambient

R_θJA

508 (Note 1.)

311 (Note 2.)

Thermal Resistance –

Junction-to-Lead

R_θJL

174 (Note 1.)

208 (Note 2.)

Junction and Storage

Temperature Range

T_J, T

–55 to +150

stg

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

1/8

Rev :01.06.2018

www.leiditech.com

12 3 4 5 6 7 8

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