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LM555C PDF预览

LM555C

更新时间: 2024-01-20 10:53:42
品牌 Logo 应用领域
哈里斯 - HARRIS 振荡器军事
页数 文件大小 规格书
6页 83K
描述
Timers for Timing Delays and Oscillator Application in Commercial, Industrial and Military Equipment

LM555C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.13
Is Samacsys:N模拟集成电路 - 其他类型:PULSE; RECTANGULAR
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 V认证状态:Not Qualified
子类别:Analog Waveform Generation Functions最大供电电流 (Isup):12 mA
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

LM555C 数据手册

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CA555, CA555C, LM555, LM555C, NE555  
o
Electrical Specifications T = 25 C, V+ = 5V to 15V Unless Otherwise Specified (Continued)  
A
CA555, LM555  
CA555C, LM555C, NE555  
PARAMETER  
Output Rise Time  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
100  
100  
MAX  
MIN  
TYP  
100  
100  
MAX UNITS  
t
-
-
-
-
-
-
-
-
ns  
ns  
R
Output Fall Time  
NOTES:  
t
F
2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value.  
3. The threshold current will determine the sum of the values of R and R to be used in Figure 4 (astable operation); the maximum total  
1
2
R
+ R = 20M.  
2
1
Schematic Diagram  
THRESHOLD  
COMPARATOR  
TRIGGER  
COMPARATOR  
V+  
FLIP-FLOP  
OUTPUT  
8
4.7K  
830  
1
4.7K  
1K  
5K  
6.8K  
D
D
2
Q
Q
16  
10  
Q
19  
Q
Q
4
3
Q
20  
OUTPUT  
3
3.9K  
7K  
THRESHOLD  
6
Q
Q
7
1
Q
Q
5
2
D
3
D
4
4.7K  
5K  
5K  
10K  
Q
18  
Q
Q
11 12  
CONTROL  
VOLTAGE  
220  
Q
21  
Q
Q
17  
Q
13  
9
5
Q
15  
4.7K  
2
TRIGGER  
Q
14  
RESET  
100K  
4
Q
8
RESET  
7
DISCHARGE  
Q
6
100  
DISCHARGE  
1
V-  
NOTE: Resistance values are in ohms.  
Typical Applications  
Reset Timer (Monostable Operation)  
Figure 1 shows the CA555 connected as a reset timer. In this gized). The action allows the voltage across the capacitor to  
mode of operation capacitor C is initially held discharged by increase exponentially with the constant t = R C . When the  
T
1 T  
a transistor on the integrated circuit. Upon closing the “start” voltage across the capacitor equals 2/3 V+, the comparator  
switch, or applying a negative trigger pulse to terminal 2, the resets the flip-flop which in turn discharges the capacitor rap-  
integral timer flip-flop is “set” and releases the short circuit idly and drives the output to its low state.  
across C which drives the output voltage “high” (relay ener-  
T
8-5  

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