LH7A400
32-Bit System-on-Chip
Table 1. Functional Pin List (Cont’d)
PBGA CABGA
RESET
STATE
STANDBY OUTPUT
SIGNAL
PH6/
DESCRIPTION
PIN
PIN
STATE
DRIVE
• GPIO Port H
R5
P7
Input: PH6
No Change
8 mA
AC97RESET
• Audio Codec (AC97) Reset
• GPIO Port H
PH7/nPC-
STATRE
T5
T6
• Status Read Enable for PC Card (PCMCIA or Input: PH7
CompactFlash) in single or dual card mode
No Change
8 mA
R6
R8
T7
R9
LCDFP
LCDLP
LCD Frame Synchronization pulse
LCD Line Synchronization pulse
LOW
LOW
LOW
LOW
12 mA
12 mA
LCDENAB/
LCDM
• LCD TFT Data Enable
• LCD STN AC Bias
LOW:
LCDENAB
P9
P9
LOW
LOW
12 mA
12 mA
N9
P7
R7
T7
N8
N9
M8
P8
R8
T8
LCDDCLK
LCDVD0
LCDVD1
LCDVD2
LCDVD3
LCD Data Clock
LOW
LCD Video Data Bus
LOW
LOW
12 mA
75 mA
(NOM.)
75 mA
(NOM.)
T15
T16
E7
T16
R16
C7
USBDP
USB Data Positive (Differential Pair)
USB Data Negative (Differential Pair)
Input
Input
Input
Input
Input
Input
Input
Input
USBDN
nPWME0
nPWME1
DC-DC Converter Pulse Width
Modulator 0 Enable
DC-DC Converter Pulse Width
Modulator 1 Enable
D7
A6
DC-DC Converter Pulse Width
C7
B7
B6
B5
PWM0
PWM1
Modulator 0 Output during normal operation and Input
Polarity Selection input at reset
Input
Input
8 mA
8 mA
DC-DC Converter Pulse Width
Modulator 1 Output during normal operation and Input
Polarity Selection input at reset
• Audio Codec (AC97) Clock
Input
C4
D5
B4
A4
A3
B3
A2
E2
E3
A2
A1
B2
E6
C3
B1
D4
E1
F3
ACBITCLK
ACOUT
ACSYNC
ACIN
Input
LOW
LOW
Input
LOW
Input
Input
Input
Input
• Audio Codec (ACI) Clock
• Audio Codec (AC97) Output
LOW
8 mA
8 mA
• Audio Codec (ACI) Output
• Audio Codec (AC97) Synchronization
LOW
• Audio Codec (ACI) Synchronization
• Audio Codec (AC97) Input
Input
• Audio Codec (ACI) Input
MMCCLK/
MMSPICLK
• MultiMediaCard Clock (20 MHz MAX.)
• MultiMediaCard SPI Mode Clock
LOW:
MMCCLK
8 mA
8 mA
8 mA
MMCCMD/
MMSPIDIN
• MultiMediaCard Command
Input:
• MultiMediaCard SPI Mode Data Input
MMCCMD
MMCDATA/
• MultiMediaCard Data
Input:
MMSPIDOUT • MultiMediaCard SPI Mode Data Output
MMCDATA
UART2 Clear to Send Signal. This pin is an out-
UARTCTS2
Input
Input
put for JTAG boundary scan only.
UART2 Data Carrier Detect Signal. This pin is out-
UARTDCD2
put for JTAG boundary scan only.
E5
F2
G4
G5
UARTDSR2
UARTIRTX1
UART2 Data Set Ready Signal
IrDA Transmit
Input
LOW
Input
LOW
8 mA
8 mA
IrDA Receive. This pin is an output for JTAG
boundary scan only.
F3
F4
G6
F1
UARTIRRX1
UARTTX2
Input
Input
UART2 Transmit Data Output
HIGH
HIGH
10
12/8/03
Preliminary Data Sheet