Datasheet > LF198QML-SP

LF198QML-SP

更新时间： 2022-10-12 16:15:22

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
20页	994K
描述
Monolithic Sample-and-Hold Circuits

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数据手册

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LF198QML-SP 数据手册

Electrical Characteristics (Continued)

The following specifications apply unless otherwise specified. V_CC

erence Pin = 0V, Logic Pin = 4V

15V, R_L= 10KΩ, V_IN= 0V, C_HOLD= 0.01 µF, Logic Ref-

Sub-

groups

Symbol

V_HS

Parameter

Conditions

Notes

Min Max

Unit

Hold Step

(Note 4)

-2.0

-5.6

-2.5

-5.6

-2.5

-5.6

2.0

5.6

+V_CC= 15V -V_CC= -15V

+V_CC= 3.5V, -V_CC= -26.5V

+V_CC= 26.5V, -V_CC= -3.5V

+V_CC= 7V, -V_CC= -3V

2, 3

(Note 4)

2.5

5.6

2, 3

2.5

5.6

2, 3

A_E

Gain Error

0.02

0.06

0.005

0.02

0.005

0.06

0.005

0.02

2, 3

+V_CC= 3.5V, -V_CC= -26.5V

+V_CC= 32.5V, -V_CC= -3.5V

+V_CC= 26.5V, -V_CC= -3.5V

+V_CC= 8V, -V_CC= -28V

+V_CC= 28V, -V_CC= -8V

+V_CC= 18V, -V_CC= -18V

+V_CC= 8V, -V_CC= -28V

+V_CC= 28V, -V_CC= -8V

2, 3

Z_I

Input Impedance

10.0

0.8

GΩ

Ω

2, 3

10.0

0.8

2, 3

Z_O

Output Impedance

2.0

4.0

-4.5

-3.0

Ω

2, 3

I_Charge

Capacitor Charging Current

-25

4.5

3.0

2, 3

Logic

V_OS

Logic Pin Current

+V_CC= 18V, -V_CC= -18V,

µA

1, 2, 3

Mode = "Sample", Logic = 7V

1.0

0.5

3.5

6.0

1.1

2.0

µA

2, 3

+V_CC= 18V, -V_CC= -18V,

Mode = "Hold", Logic = -30V

Input Offset Voltage

-3.5

-6.0

-1.1

-2.0

7.0

µA

+V_CC= 15V, -V_CC= -15V,

I_Drive= +1mA

2, 3

Delta V_OSInput Offset Voltage

+V_CC= 15V, -V_CC= -15V,

I_Drive= +1mA to -1mA

2, 3

I_OS

Output Short Circuit Current

Logic Reference Pin Current

+V_CC= 18V, -V_CC= -18V

-25

-7.0

1.0

5.0

I_LogicRef

PSRR

FTRR

V_TH

-1.0

-0.5

+V_CC= 18V, -V_CC= -18V,

Mode = "Sample", Logic = 7V

µA

2, 3

+V_CC= 18V, -V_CC= -18V,

Mode = "Hold", Logic = -30V

µA

1, 2, 3

Power Supply Rejection Ratio

Feed Through Rejection Ratio

Differential Logic Level

0.8

2, 3

+V_CC= 10V, -V_CC= -15V

+V_CC= 15V, -V_CC= -10V

+V_CC= 3.5V, -V_CC= -32.5V

+V_CC= 32.5V, -V_CC= -3.5V

2, 3

(Note 8)

2.4

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