Datasheet > L5201_15

L5201_15

更新时间： 2022-10-12 16:46:29

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友顺 - UTC		/
页数	文件大小	规格书
7页	165K
描述
CMOS IC

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数据手册

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L5201_15 数据手册

L5201

CMOS IC

ꢀ

MARKING (For SOT-26/TSOT-26)

Lead Plating

Voltage Code

L F

ꢀ

PIN CONFIGURATIONS

SOT-26/TSOT-26

MSOP-8

OUT

UTC

L5201-XX

(Fixed)

UTC

L5201-ADJ

GND

SHDN

SGND

PGND

SHDN

ꢀ

PIN DESCRIPTION

PIN NO.

NAME

FUNCTION

L5201-ADJ

L5201-xx

SOT-26/TSOT-26

MSOP-8

C+

V_IN

Flying Capacitor Positive Terminal

Input Supply Voltage, should be bypassed with at least 6.8µf lo

w ESR

ceramic capacitor.

C¯

Flying Capacitor Negative Terminal

Ground terminal, should be tied to a ground plane for best

performance

4, 5

GND

Shutdown Mode, Active-Low Input. A low on

disables the

SHDN

L5201 series.

must not be allowed to float.

SHDN

Feedback Input Pin for Adjustable output. An output divider should be

connected from V_OUTto FB to program the output voltage.

Regulated Output Voltage, should be bypassed with at least 6.8µf low

V_OUTESR ceramic capacitor as close as possible to the pin for best

performance

X : The pin is Inexistent for SOT-26 and TSOT-26 package.

UNISONIC TECHNOLOGIES CO., LTD

2 of 7

QW-R502-107,A

www.unisonic.com.tw

123 4 5 6 7

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