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L017D12VC PDF预览

L017D12VC

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
超微 - AMD /
页数 文件大小 规格书
48页 952K
描述
16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

L017D12VC 数据手册

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GENERAL DESCRIPTION  
The Am29LV017D is a 16 Mbit, 3.0 Volt-only Flash  
memory organized as 2,097,152 bytes. The device is  
offered in 48-ball FBGA and 40-pin TSOP packages.  
The byte-wide (x8) data appears on DQ7–DQ0. All  
read, program, and erase operations are accomplished  
using only a single power supply. The device can also  
be programmed in standard EPROM programmers.  
The host system can detect whether a program or  
erase operation is complete by observing the RY/BY#  
pin, or by reading the DQ7 (Data# Polling) and DQ6  
(toggle) status bits. After a program or erase cycle has  
been completed, the device is ready to read array data  
or accept another command.  
The sector erase architecture allows memory sectors  
to be erased and reprogrammed without affecting the  
data contents of other sectors. The device is fully  
erased when shipped from the factory.  
The standard device offers access times of 70, 90, and  
120 ns, allowing high speed microprocessors to  
operate without wait states. To eliminate bus contention  
the device has separate chip enable (CE#), write  
enable (WE#) and output enable (OE#) controls.  
Hardware data protection measures include a low  
V
detector that automatically inhibits write opera-  
CC  
The device requires only a single 3.0 volt power sup-  
ply for both read and write functions. Internally gener-  
ated and regulated voltages are provided for the  
program and erase operations.  
tions during power transitions. The hardware sector  
protection feature disables both program and erase  
operations in any combination of the sectors of mem-  
ory. This can be achieved in-system or via program-  
ming equipment.  
The device is entirely command set compatible with the  
JEDEC single-power-supply Flash standard. Com-  
mands are written to the command register using stan-  
dard microprocessor write timings. Register contents  
serve as input to an internal state-machine that con-  
trols the erase and programming circuitry. Write cycles  
also internally latch addresses and data needed for the  
programming and erase operations. Reading data out  
of the device is similar to reading from other Flash or  
EPROM devices.  
The Erase Suspend feature enables the user to put  
erase on hold for any period of time to read data from,  
or program data to, any sector that is not selected for  
erasure. True background erase can thus be achieved.  
The hardware RESET# pin terminates any operation  
in progress and resets the internal state machine to  
reading array data. The RESET# pin may be tied to the  
system reset circuitry. A system reset would thus also  
reset the device, enabling the system microprocessor  
to read the boot-up firmware from the Flash memory.  
Device programming occurs by executing the program  
command sequence. This initiates the Embedded  
Program algorithm—an internal algorithm that auto-  
matically times the program pulse widths and verifies  
proper cell margin. The Unlock Bypass mode facili-  
tates faster programming times by requiring only two  
write cycles to program data instead of four.  
The device offers two power-saving features. When ad-  
dresses have been stable for a specified amount of  
time, the device enters the automatic sleep mode.  
The system can also place the device into the standby  
mode. Power consumption is greatly reduced in both  
these modes.  
Device erasure occurs by executing the erase com-  
mand sequence. This initiates the Embedded Erase  
algorithm—an internal algorithm that automatically  
preprograms the array (if it is not already programmed)  
before executing the erase operation. During erase, the  
device automatically times the erase pulse widths and  
verifies proper cell margin.  
AMD’s Flash technology combines years of Flash  
memory manufacturing experience to produce the  
highest levels of quality, reliability and cost effective-  
ness. The device electrically erases all bits within  
a sector simultaneously via Fowler-Nordheim tun-  
neling. The data is programmed using hot electron injec-  
tion.  
6
Am29LV017D  

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