5秒后页面跳转
L017D12VC PDF预览

L017D12VC

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
超微 - AMD /
页数 文件大小 规格书
48页 952K
描述
16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

L017D12VC 数据手册

 浏览型号L017D12VC的Datasheet PDF文件第2页浏览型号L017D12VC的Datasheet PDF文件第3页浏览型号L017D12VC的Datasheet PDF文件第4页浏览型号L017D12VC的Datasheet PDF文件第6页浏览型号L017D12VC的Datasheet PDF文件第7页浏览型号L017D12VC的Datasheet PDF文件第8页 
TABLE OF CONTENTS  
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .6  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .7  
Special Handling Instructions for FBGA Packages .................. 8  
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .8  
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8  
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .9  
Device Bus Operations . . . . . . . . . . . . . . . . . . . . .10  
Table 1. Am29LV017D Device Bus Operations.............................. 10  
Requirements for Reading Array Data ...................................10  
Writing Commands/Command Sequences ............................10  
Program and Erase Operation Status .................................... 11  
Standby Mode ........................................................................ 11  
Automatic Sleep Mode ...........................................................11  
RESET#: Hardware Reset Pin ...............................................11  
Output Disable Mode .............................................................. 11  
Table 2. Am29LV017D Sector Address Table ................................ 12  
Autoselect Mode .....................................................................13  
Table 3. Am29LV017D Autoselect Codes (High Voltage Method).. 13  
Sector Protection/Unprotection ...............................................13  
Temporary Sector Unprotect ..................................................13  
Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 14  
Figure 2. Temporary Sector Unprotect Operation........................... 15  
Hardware Data Protection ......................................................15  
Reading Toggle Bits DQ6/DQ2 ...............................................24  
Figure 6. Toggle Bit Algorithm........................................................ 25  
DQ5: Exceeded Timing Limits ................................................ 26  
DQ3: Sector Erase Timer ....................................................... 26  
Table 9. Write Operation Status..................................................... 26  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 27  
Figure 7. Maximum Negative Overshoot Waveform ...................... 27  
Figure 8. Maximum Positive Overshoot Waveform........................ 27  
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 27  
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28  
Figure 9. I Current vs. Time (Showing Active  
CC1  
and Automatic Sleep Currents)...................................................... 29  
Figure 10. Typical I vs. Frequency ........................................... 29  
CC1  
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 11. Test Setup..................................................................... 30  
Table 10. Test Specifications ......................................................... 30  
Figure 12. Input Waveforms and Measurement Levels ................. 30  
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 31  
Read Operations ....................................................................31  
Figure 13. Read Operations Timings ............................................. 31  
Hardware Reset (RESET#) .................................................... 32  
Figure 14. RESET# Timings .......................................................... 32  
Erase/Program Operations .....................................................33  
Figure 15. Program Operation Timings.......................................... 34  
Figure 16. Chip/Sector Erase Operation Timings .......................... 34  
Figure 17. Data# Polling Timings (During Embedded Algorithms). 35  
Figure 18. Toggle Bit Timings (During Embedded Algorithms)...... 36  
Figure 19. DQ2 vs. DQ6................................................................. 36  
Figure 20. Temporary Sector Unprotect Timing Diagram .............. 37  
Figure 21. Sector Protect/Unprotect Timing Diagram .................... 38  
Figure 22. Alternate CE# Controlled Write Operation Timings ...... 40  
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 41  
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . 41  
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 41  
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 42  
TS 04040-Pin Standard TSOP ............................................42  
TSR04040-Pin Reverse TSOP ........................................... 43  
FBC04848-Ball Fine-Pitch Ball Grid Array (FBGA)  
8 x 9 mm package ..................................................................44  
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 45  
Revision A (October 1997) .....................................................45  
Revision B (October 1997) .....................................................45  
Revision C (January 1998) .....................................................45  
Revision C+1 (February 1998) ...............................................45  
Revision C+2 (March 1998) .................................................... 45  
Revision C+3 (August 1998) ...................................................45  
Revision D (January 1999) .....................................................45  
Revision D+1 (April 12, 1999) .................................................45  
Revision E (February 2, 2000) ................................................ 45  
Revision E+1 (November 7, 2000) ......................................... 46  
Revision E+2 (June 10, 2004) ................................................ 46  
Low V Write Inhibit .............................................................. 15  
CC  
Write Pulse Glitch” Protection ...............................................15  
Logical Inhibit .......................................................................... 15  
Power-Up Write Inhibit ............................................................ 15  
Common Flash Memory Interface (CFI) . . . . . . .16  
Table 4. CFI Query Identification String.......................................... 16  
Table 5. System Interface String..................................................... 16  
Table 6. Device Geometry Definition .............................................. 17  
Table 7. Primary Vendor-Specific Extended Query ........................ 17  
Command Definitions . . . . . . . . . . . . . . . . . . . . . .18  
Reading Array Data ................................................................18  
Reset Command .....................................................................18  
Autoselect Command Sequence ............................................18  
Byte Program Command Sequence ....................................... 18  
Unlock Bypass Command Sequence .....................................19  
Figure 3. Program Operation .......................................................... 19  
Chip Erase Command Sequence ........................................... 19  
Sector Erase Command Sequence ........................................20  
Erase Suspend/Erase Resume Commands ........................... 20  
Figure 4. Erase Operation............................................................... 21  
Command Definitions .............................................................22  
Table 8. Am29LV017D Command Definitions ............................... 22  
Write Operation Status . . . . . . . . . . . . . . . . . . . . .23  
DQ7: Data# Polling ................................................................. 23  
Figure 5. Data# Polling Algorithm ................................................... 23  
RY/BY#: Ready/Busy# ...........................................................24  
DQ6: Toggle Bit I ....................................................................24  
DQ2: Toggle Bit II ................................................................... 24  
Am29LV017D  
7

与L017D12VC相关器件

型号 品牌 描述 获取价格 数据表
L017D12VD AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格

L017D12VF AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格

L017D12VI AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格

L017D70VC AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格

L017D70VD AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格

L017D70VF AMD 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

获取价格