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L-TTSI001161BL-2-DB PDF预览

L-TTSI001161BL-2-DB

更新时间： 2024-02-07 04:02:23
品牌 Logo 应用领域
杰尔 - AGERE /
页数 文件大小 规格书
61页 1013K
描述
1k x 1k Time-Slot Interchanger

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中文翻译

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L-TTSI001161BL-2-DB 技术参数

是否Rohs认证：符合生命周期：Transferred
包装说明：BGA, BGA240,18X18,40Reach Compliance Code：unknown
风险等级：5.7Is Samacsys：N
JESD-30 代码：S-PBGA-B240端子数量：240
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装等效代码：BGA240,18X18,40封装形状：SQUARE
封装形式：GRID ARRAY电源：1.5,3.3 V
认证状态：Not Qualified子类别：Other Telecom ICs
表面贴装：YES温度等级：INDUSTRIAL
端子形式：BALL端子节距：1 mm
端子位置：BOTTOMBase Number Matches：1

L-TTSI001161BL-2-DB 数据手册

 浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第2页浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第3页浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第4页浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第5页浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第6页浏览型号L-TTSI001161BL-2-DB的Datasheet PDF文件第7页 
Data Sheet, Revision 3  
September 21, 2005  
TSI-1  
1k x 1k Time-Slot Interchanger  
1 Introduction  
The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page  
61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text  
are highlighted in red. Changes within figures, and the figure title itself, are highlighted in red, if feasible. Formatting or  
grammatical changes have not been highlighted. Deleted sections, paragraphs, figures, or tables will be specifically  
mentioned.  
This document consists of two major sections:  
„ The TSI-1 device hardware description. This section contains ball information, operating conditions, dc electrical charac-  
teristics, timing diagrams, ac characteristics, and packaging information.  
„ The TSI-1 device register description. This section contains register information.  
1.1 Related Documents  
The documentation package for this device consists of the following documents:  
„ The TSI-1 1k x 1k Time-Slot Interchanger Product Brief, the TSI Family Selection Guide, the TSI-1 1k x 1k Time-Slot  
Interchanger Data Sheet (this document), and the TSI-1 Time-Slot Interchanger System Design Guide.  
These documents are available on the public website shown below.  
®
If the reader displays this document using Acrobat Reader , clicking on any blue text will bring the reader to that reference  
point.  
To access related documents, including the documents mentioned above, please go to the following public website, or con-  
tact your Agere representative (see the last page of this document).  
http://www.agere.com/telecom/time_slot_interchangers.html  
1.2 Block Diagram and High-Level Interface Definition  
TEST PATTERN  
GENERATOR  
TEST PATTERN  
MONITOR  
TEST ACCESS  
PORT  
1k x 1k Switch Fabric  
16  
16  
RECEIVE  
CHI  
TRANSMIT  
CHI  
DATA  
STORE  
MICROPROCESSOR  
INTERFACE  
WRITE ADDRESS  
COUNTER  
CONNECTION  
STORE  
READ ADDRESS  
COUNTER  
CLOCK  
GENERATOR  
Figure 1-1. Block Diagram and High-Level Interface Definition  
1234567...61

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