Datasheet > KSMD12N20LTM_F085

KSMD12N20LTM_F085

更新时间： 2024-02-27 03:00:13

品牌	Logo	应用领域
科盛美 - KERSEMI		/
页数	文件大小	规格书
8页	1449K
描述
200V Logic Level N-Channel MOSFET

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KSMD12N20LTM_F085 数据手册

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KSMD12N20LTM_F085

200V Logic Level N-Channel MOSFET

Features

TO-252

TO-251

•

9.0A, 200V, R

= 0.28Ω @V = 10 V

DS(on) GS

Low gate charge ( typical 16 nC)

Low Crss ( typical 17 pF)

Fast switching

100% avalanche tested

Improved dv/dt capability

Low level gate drive requirement allowing direct

opration from logic drivers

Qualified to AEC Q101

•

RoHS Compliant

General Description

These N-Channel enhancement mode power field effect

transistors are produced using Kersemi proprietary,

planar stripe, DMOS technology.

ꢁ

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switching DC/DC converters,

switch mode power supply, motor control.

! "

ꢂ

ꢀ

Absolute Maximum

T = 25°C unless otherwise noted

Ratings

Symbol

Parameter

KSMD12N20LTM_F085

Units

Drain-Source Voltage

200

9.0

5.7

DSS

- Continuous (T = 25°C)

Drain Current

- Continuous (T = 100°C)

(Note 1)

Drain Current

- Pulsed

Gate-Source Voltage

Avalanche Current

± 20

GSS

(Note 1)

(Note 2)

9.0

dv/dt

Peak Diode Recovery dv/dt

5.5

2.5

V/ns

Power Dissipation (T = 25°C) *

Power Dissipation (T = 25°C)

- Derate above 25°C

Operating and Storage Temperature Range

0.44

W/°C

°C

T , T

-55 to +150

STG

Maximum lead temperature for soldering purposes,

300

°C

1/8" from case for 5 seconds

Thermal Characteristics

Symbol

Parameter

Typ

Max

2.27

Units

°C/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient *

Thermal Resistance, Junction-to-Ambient

θJC

θJA

110

* When mounted on the minimum pad size recommended (PCB Mount)

2014-7-15

www.kersemi.com

12 3 4 5 6 7 8

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