PRODUCT OVERVIEW
KS88C4616/C4632/P4632
Table 1-1. KS88C4616/C4632 Pin Descriptions
Pin
Name
Pin
Type
Pin Description
Circuit
Number
Pin
Number
Share
Pins
P0.0–P0.7
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull, open-drain, output. Pull-up
resistors are assignable by software.
Port 0 can also be configured as external
interface address line A8–A15
1
8–1
(1, 64–58)
–
A8–A15
P1.0–P1.7
P2.0–P2.3
I/O
I/O
Same general characteristics as port 0.
Port 1 can also be configured as external
interface address/data lines AD0–AD7
1
2
64–57
(57–50)
–
AD0–AD7
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. P2.0–P2.3 can be
configured for external bus control signals.
P2.4–P2.7 are used for general I/O or for the
ZCD, BUZ, INT2 and INT3
38–35
(31–28)
–
AS, DS
DM, R/W
ZCD, BUZ
INT2, INT3
P2.4–P2.7
P3.0–P3.7
3
4
34–31
(27–24)
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Each port 3 pin has
an alternative function:
30–22
(23–15)
(See pin
description)
P3.0: PWM0 (PWM0 module output)
P3.1: PWM1 (PWM1 module ouptut)
P3.2: T0 (T0 capture input or PWM output)
P3.3: T0CK (timer 0 external clock input)
P3.4: SCK (SIO module input)
P3.5: SI (SIO module clock I/O)
P3.6: SO (SIO module output)
P3.7: TxD: SO1
(The T0 function for P3.2 is selected using the
T0CON register.)
P4.0–P4.7
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Port 4 pins are used
external interrupts INT4–INT11 or for the
following share functions:
5
21, 15–9
(14–2)
(See pin
description)
P4.1: RxD (UART module input)
P4.3: CAPA (capture input)
P4.4: TCCK (timer/counter C clock input)
P4.5: TDCK (timer/counter D clock input)
P4.6: TCG (timer C gate input)
P4.7: TDG (timer D gate input)
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