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KM44V4000CK-5 PDF预览

KM44V4000CK-5

更新时间: 2023-01-03 09:58:48
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管
页数 文件大小 规格书
20页 340K
描述
Fast Page DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-26/24

KM44V4000CK-5 数据手册

 浏览型号KM44V4000CK-5的Datasheet PDF文件第2页浏览型号KM44V4000CK-5的Datasheet PDF文件第3页浏览型号KM44V4000CK-5的Datasheet PDF文件第4页浏览型号KM44V4000CK-5的Datasheet PDF文件第5页浏览型号KM44V4000CK-5的Datasheet PDF文件第6页浏览型号KM44V4000CK-5的Datasheet PDF文件第7页 
KM44C4000C, KM44C4100C  
KM44V4000C, KM44V4100C  
CMOS DRAM  
4M x 4Bit CMOS Dynamic RAM with Fast Page Mode  
DESCRIPTION  
This is a family of 4,194,304 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells  
within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5 or -6), power consump-  
tion(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-  
RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.  
This 4Mx4 Fast Page Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power  
consumption and high reliability. It may be used as main memory for high level computer, microcomputer and personal computer.  
FEATURES  
• Fast Page Mode operation  
Part Identification  
• CAS-before-RAS refresh capability  
• RAS-only and Hidden refresh capability  
• Self-refresh capability (L-ver only)  
- KM44C4000C/C-L (5V, 4K Ref.)  
- KM44C4100C/C-L (5V, 2K Ref.)  
- KM44V4000C/C-L (3.3V, 4K Ref.)  
- KM44V4100C/C-L (3.3V, 2K Ref.)  
• Fast parallel test mode capability  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
Active Power Dissipation  
Unit : mW  
5V  
• Available in Plastic SOJ and TSOP(II) packages  
• Single +5V±10% power supply (5V product)  
• Single +3.3V±0.3V power supply (3.3V product)  
3.3V  
Speed  
4K  
2K  
4K  
2K  
-5  
-6  
324  
288  
396  
360  
495  
440  
605  
550  
FUNCTIONAL BLOCK DIAGRAM  
Refresh Cycles  
Part  
VCC  
Refresh  
cycle  
Refresh period  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
NO.  
Normal  
L-ver  
VBB Generator  
C4000C  
V4000C  
C4100C  
V4100C  
5V  
3.3V  
5V  
4K  
2K  
64ms  
Data in  
128ms  
Buffer  
Row Decoder  
Refresh Timer  
Refresh Control  
Refresh Counter  
32ms  
3.3V  
DQ0  
to  
DQ3  
Memory Array  
4,194,304 x 4  
Cells  
Performance Range  
A0-A11  
(A0 - A10) *1  
A0 - A9  
(A0 - A10) *1  
Row Address Buffer  
Col. Address Buffer  
Speed  
-5  
Remark  
tRAC  
50ns  
60ns  
tCAC  
tRC  
tPC  
Data out  
Buffer  
13ns  
90ns  
35ns 5V/3.3V  
Column Decoder  
OE  
-6  
15ns 110ns 40ns 5V/3.3V  
Note) *1 : 2K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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