KK74AC175N

更新时间： 2024-01-16 04:52:02

品牌	Logo	应用领域
可天士 - KODENSHI		触发器栅时钟
页数	文件大小	规格书
6页	342K
描述
Quad D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS

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技术参数
数据手册

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KK74AC175N 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

KK74AC175N 数据手册

TECHNICAL DATA

KK74AC175

Quad D Flip-Flop with

Common Clock and Reset

High-Speed Silicon-Gate CMOS

The KK74AC175 is identical in pinout to the LS/ALS175,

HC/HCT175. The device inputs are compatible with standard CMOS

outputs; with pullup resistors, they are compatible with LS/ALS outputs.

This device consists of four D flip-flops with common Reset and

Clock inputs, and separate D inputs. Reset (active-low) is asynchronous

and occurs when a low level is applied to the Reset input. Information at a

D input is transferred to the corresponding Q output on the next positive-

going edge of the Clock input.

•

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2.0 to 6.0 V

Low Input Current: 1.0 µA; 0.1 µA @ 25°C

High Noise Immunity Characteristic of CMOS Devices

Outputs Source/Sink 24 mA

ORDERING INFORMATION

KK74AC175N Plastic

KK74AC175D SOIC

T_A= -40° to 85° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

Clock

Outputs

Reset

PIN 16=V_CC

PIN 8 = GND

no change

X = Don’t care

12 3 4 5 6

中文翻译

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